tda9150b NXP Semiconductors, tda9150b Datasheet - Page 12

• Manufacturer Part Number: tda9150b
• Description: Programmable Deflection Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
EW
The EW geometry processing is DC coupled and therefore
independent of field frequency. R
current for both the vertical and EW geometry processing.
The EW output is an ESD-protected single-ended current
output.
The EW width/width ratio can be set from 100 to 80% in
63 steps via subaddress 04 and the EW parabola/width
ratio from 0 to 20% via subaddress 05. The EW
corner/EW parabola ratio has a control range of 40 to 0%
in 63 steps via subaddress 06.
The EW trapezium correction can be set from
subaddress 03.
BULT GENERATOR
The Bult generator makes the EW waveform continuous
(see Fig.20).
Protection input (pin 3)
The protection input (PROT) is a CMOS input.
The input voltage must be EHT scaled and has the
following characteristics:
Two modes of protection are available with the aid of
control bit PRD.
All further actions, such as a write of the LFSS bit, are
achieved by the I
configuration used and are defined by user software.
July 1994
1.5 to +1.5% in 7 steps via the most significant nibble at
With PRD = logic 1 the protection mode is selected,
HOUT will be defeated and the PROT bit in the status
word is set if the input voltage is above 3.9 V. Thus the
deflection stops and EW output current is zero, while the
vertical output current is reduced to 20% of the adjusted
value. A new start of the circuit is I
the user software.
With PRD = logic 0 the detection mode is selected,
HOUT will not be defeated and the over voltage
information is only written in the PROT status bit and can
be read by the I
Programmable deflection controller
GEOMETRY PROCESSING
2
2
C-bus. They depend on the
C-bus.
CONV
2
C-bus controlled with
sets the reference
12
Flash detection/protection input (pin 9)
The FLASH input is a CMOS input with an internal pull-up
current of approximately 8 A.
When a negative-going edge crosses the 0.75 V level a
restart will be executed with a soft start of approximately
2000 lines, such as in the soft-start mode. When the
function is not used pin 9 can be connected to ground, V
or left open-circuit, the internal pull-up current source will
prevent any problems. However a hard wired connection
to V
used.
EHT compensation (pin 7)
The EHT input is a CMOS input.
The EHT compensation input permits scan amplitude
modulation should the EHT supply not be perfect. For
correct tracking of the vertical and horizontal deflection the
gain of the EW output stage, provided by the ratio
R
The input for EHT compensation can be derived from an
EHT bleeder or from the picture tubes aquadag
(subaddress 0B, bit BLDS).
EHT compensation can be set via subaddress 07 in
63 steps allowing a scan modulation range from
10 to +9.7%.
CONV-EW
CC
or ground is recommended when the function is not
/R
CONV
, must be
1
16
V
scan
Preliminary specification
V
TDA9150B
ref
(see Fig.14).
CC