tda9898hn/v2 NXP Semiconductors, tda9898hn/v2 Datasheet - Page 33

• Manufacturer Part Number: tda9898hn/v2
• Description: Tda9897; Tda9898 Multistandard Hybrid If Processing
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA9897_TDA9898_3
Product data sheet
Table 37.
Table 38.
[1]
[2]
Table 39.
[1]
Bit
7 and 6
5 and 4
3
2
1
0
Bit
AGC2
W6[5]
0
0
1
1
TAGC1
In integral TAGC loop mode the pin TAGC provides sink and source currents for control. TakeOver Point
(TOP) is set via register W9 TOPNEG[4:0].
For bit description refer to
For bit description of MOD refer to
7
W6 - data write register bit allocation
W6 - data write register bit description
AGC mode and behavior
Symbol
TAGC[1:0]
AGC[2:1]
FMWIDE1
TWOFLO
-
DIRECT
AGC1
W6[4]
0
1
0
1
TAGC0
6
Rev. 03 — 11 January 2008
VIF AGC; MOD = 1
normal
off (minimum gain)
fast
2nd fast
Table 16
AGC2
5
Description
tuner AGC mode
AGC mode and behavior; see
FM window
synthesizer frequency selection
0 = fixed value
direct IF at DTV mode; TV2 = 0
00 = TAGC integral loop mode; all currents off
01 = TAGC integral loop mode; source current off
10 = TAGC integral loop mode
11 = TAGC derived from IF AGC; recommended for positive
modulated signals
1 = 1 MHz
0 = see
1 = zero IF Japan mode (57 MHz)
0 = synthesizer mode
1 = direct IF output
0 = zero IF or low IF output
Table 23
and
Table
AGC1
Table 28
4
W2[7] and
17.
[1]
[1]
bit FMWIDE0
FMWIDE1
Table
TDA9897; TDA9898
3
Multistandard hybrid IF processing
24.
Table 39
[2]
TWOFLO
SIF AGC
normal
off (minimum gain)
normal
fast
2
© NXP B.V. 2008. All rights reserved.
1
0
DIRECT
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