tda9898hn/v2 NXP Semiconductors, tda9898hn/v2 Datasheet - Page 22
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tda9898hn/v2
Manufacturer Part Number
tda9898hn/v2
Description
Tda9897; Tda9898 Multistandard Hybrid If Processing
Manufacturer
NXP Semiconductors
Datasheet
1.TDA9898HNV2.pdf
(103 pages)
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NXP Semiconductors
TDA9897_TDA9898_3
Product data sheet
Fig 8. I
S
2
C-bus write format (slave receives data)
slave address
A6 to A0
9.2 Write format
BYTE 1
from master to slave
from slave to master
Table 11.
[1]
Bit
VAGC5
R2[5]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
The reference of 0 (TOP) can be adjusted via TOPPOS[4:0] (register W10; see
via potentiometer at pin TOP2.
0
A
AGC bits (for corresponding AGC characteristic see
VAGC4
R2[4]
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
subaddress
A7 to A0
BYTE 2
Rev. 03 — 11 January 2008
VAGC3
R2[3]
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
A
VAGC2
R2[2]
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
bits 7 to 0
BYTE 3
data 1
TDA9897; TDA9898
VAGC1
R2[1]
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Multistandard hybrid IF processing
A
S = START condition
A = acknowledge
P = STOP condition
Figure
bits 7 to 0
BYTE n
data n
VAGC0
R2[0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Table 49
12)
© NXP B.V. 2008. All rights reserved.
…continued
and
A
Typical
(V)
1.56
1.60
1.64
1.68
1.72
1.76
1.80
1.84
1.88
1.92
1.96
2.00
2.04
2.08
2.12
2.16
2.20
2.24
2.28
2.32
2.36
2.40
2.44
2.48
2.52
V
Table
AGC(VIF)
001aad166
22 of 103
47) or
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