pca9575 NXP Semiconductors, pca9575 Datasheet - Page 9

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pca9575

Manufacturer Part Number
pca9575
Description
16-bit I2c-bus And Smbus, Level Translating, Low Voltage Gpio With Reset And Interrupt
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 3.
PCA9575_1
Product data sheet
Register number
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
Register summary
7.3 Command register
7.4 Register definitions
7.5 Writing to port registers
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Following the successful acknowledgement of the slave address + R/W bit, the bus master
will send a byte to the PCA9575, which will be stored in the Command register.
The lowest 4 bits are used as a pointer to determine which register will be accessed. Only
a Command register code with the 4 least significant bits equal to the 16 allowable values
as defined in
command codes will not be acknowledged. At power-up, this register defaults to 00h, with
the AI bit set to logic 0, and the lowest 4 bits set to logic 0.
Data is transmitted to the PCA9575 by sending the device address and setting the least
significant bit to logic 0 (see
is sent after the address and determines which register will receive the data following the
command byte. Each 8-bit register may be updated independently of the other registers.
Fig 8.
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Reset state = 00h
Remark: The Command register does not apply to Software Reset I
Command register
Table 3 “Register summary”
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Name
IN0
IN1
INVRT0
INVRT1
BKEN0
BKEN1
PUPD0
PUPD1
CFG0
CFG1
OUT0
OUT1
MSK0
MSK1
INTS0
INTS1
Rev. 01 — 2 October 2008
16-bit I
Auto-Increment flag
Figure 6
2
C-bus and SMBus, level translating, low voltage GPIO
AI
Type
read only
read only
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read only
read only
0
or
Figure 7
0
will be acknowledged. Reserved or undefined
0
D3
Function
Input port 0 register
Input port 1 register
Polarity inversion port 0 register
Polarity inversion port 1 register
Bus-hold enable 0 register
Bus-hold enable 1 register
Pull-up/pull-down selector port 0 register
Pull-up/pull-down selector port 1 register
Configuration port 0 register
Configuration port 1 register
Output port 0 register
Output port 1 register
Interrupt mask port 0 register
Interrupt mask port 1 register
Interrupt status port 0 register
Interrupt status port 1 register
for device address). The command byte
register address
D2
D1
002aad568
D0
2
C-bus address.
PCA9575
© NXP B.V. 2008. All rights reserved.
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