uda1338h-n1 NXP Semiconductors, uda1338h-n1 Datasheet - Page 10
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uda1338h-n1
Manufacturer Part Number
uda1338h-n1
Description
Multichannel Audio Coder-decoder
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1338H-N1.pdf
(54 pages)
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Philips Semiconductors
9397 750 14389
Product data sheet
Fig 4. Block diagram of DAC mixer
DATADA1
DATADA2
DATADA3
from ADC
from I
DIS [ 1:0 ]
ch1
ch2
ch3
ch4
2
S-bus
MIX [ 1:0 ]
ICS [ 1:0 ]
8.10 Power-on reset
8.9 Audio digital-to-analog converters
The audio digital-to-analog front-end of the UDA1338H consists of 6-channel differential
SDACs: an SDAC is a multi-bit DAC based upon switched resistors. To minimize data
dependent modulation effects, a Dynamic Element Matching (DEM) algorithm scrambler
circuit and DC current compensation circuit are implemented with the SDAC.
The UDA1338H has an internal power-on reset circuit which initializes the device; see
Figure
set to their default values in the L3-bus and the I
The reset time (see
between pin V
When V
During the reset time, the system clock should be running.
5. All the digital sound processing features and the system controlling features are
DDA(AD)
ref
DE-EMPHASIS
is switched off, the device will be reset again for V
and ground. The reset time should be at least 250 s for V
mixer input
Figure
Rev. 03 — 16 February 2005
6) is determined by an external capacitor which is connected
VOLUME
VOLUME
MIXER
same as above
same as above
same as above
same as above
same as above
MIXER
MUTE
MUTE
2
C-bus modes.
1f
s
Multichannel audio coder-decoder
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
INTERPOLATION
FILTER
ref
UDA1338H
< 0.75 V.
mgw786
ref
< 1.25 V.
DAC1
DAC2
DAC3
DAC4
DAC5
DAC6
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