CY28325PVC-2 Cypress Semiconductor Corp., CY28325PVC-2 Datasheet - Page 10

• Manufacturer Part Number: CY28325PVC-2
• Description: Frequency Timing Generators For PC And Server Motherboards
• Manufacturer: Cypress Semiconductor Corp.

Data Byte 11
Data Byte 12
Data Byte 13
Data Byte 14
Document #: 38-07119 Rev. *A
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit
Bit
Bit
Bit
Pin#
Pin#
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Pin#
Pin#
–
–
–
–
–
–
–
–
–
ROCV_FREQ_SEL
ROCV_FREQ_M6
ROCV_FREQ_M5
ROCV_FREQ_M4
ROCV_FREQ_M3
ROCV_FREQ_M2
ROCV_FREQ_M1
ROCV_FREQ_M0
CPU_FSEL_N7
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
CPU_FSEL_N0
ROCV_FREQ_N7
ROCV_FREQ_N6
ROCV_FREQ_N5
ROCV_FREQ_N4
ROCV_FREQ_N3
ROCV_FREQ_N2
ROCV_FREQ_N1
ROCV_FREQ_N0
Pro_Freq_EN
Name
Name
Name
Name
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[7:0] and
CPU_FSEL_M[6:0] will be used to determine the CPU output frequency. The
new frequency will start to load whenever CPU_FSELM[6:0] is updated.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[4:0] register will be used. When it is set, the frequency ratio
stated in the SEL[4:0] register will be used.
PRELIMINARY
ROCV_FREQ_SEL determines the source of the recover frequency when
a Watchdog tImer time-out occurs. The clock generator will automatically
switch to the recovery CPU frequency based on the selection on
ROCV_FREQ_SEL.
0 = From latched FS[4:0]
1 = From the settings of ROCV_FREQ_N[7:0] & ROCV_FREQ_M[6:0]
If ROCV_FREQ_SEL is set, the values programmed in
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be use to determine
the recovery CPU output frequency.when a Watchdog Timer time-out
occurs.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When FS_Override bit is cleared, the same frequency
ratio stated in the Latched FS[4:0] register will be used. When it is set, the
frequency ratio stated in the SEL[4:0] register will be used.
If ROCV_FREQ_SEL is set, the values programmed in
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] will be used to
determine the recovery CPU output frequency when a Watchdog Timer
time-out occurs. The setting of FS_Override bit determines the
frequency ratio for CPU and other output clocks. When FS_Override bit
is cleared, the same frequency ratio stated in the Latched FS[4:0]
register will be used. When it is set, the frequency ratio stated in the
SEL[4:0] register will be used.
0 = Disabled
1 = Enabled
Programmable output frequencies enabled
Pin Description
Pin Description
Pin Description
Pin Description
CY28325-2
Page 10 of 19
Power-on
Power-on
Power-on
Power-on
Default
Default
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0