kad5610p Kenet Inc., kad5610p Datasheet - Page 20
![no-image](/images/no-image-200.jpg)
kad5610p
Manufacturer Part Number
kad5610p
Description
Dual 10-bit, 250/210/170/125msps A/d Converter
Manufacturer
Kenet Inc.
Datasheet
1.KAD5610P.pdf
(28 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
kad5610p-21Q72
Manufacturer:
Intersil
Quantity:
1 400
Company:
Part Number:
kad5610p-25Q72
Manufacturer:
Intersil
Quantity:
1 400
Figures 42 and 43 illustrate the timing relationships for
2-byte and N-byte transfers, respectively. The opera-
tion for a 3-byte transfer can be inferred from these
diagrams.
SPI Configuration
Address 0x00: chip_port_config
Bit ordering and SPI reset are controlled by this regis-
ter. Bit order can be selected as MSB to LSB (MSB first)
Rev 0.5.1 Preliminary
KAD5610P
Table 6. Byte Transfer Selection
[W1:W0]
00
01
10
11
Bytes Transferred
4 or more
1
2
3
Figure 41. Instruction/Address Phase
Figure 43. N-Byte Transfer
Figure 42. 2-Byte Transfer
or LSB to MSB (LSB first) to accommodate various mi-
crocontrollers.
Bit 7
Bit 6
Bit 5
Bit 4
Bits 3:0 These bits should always mirror bits 4:7 to
SDO Active
LSB First
Setting this bit high configures the SPI to inter-
pret serial data as arriving in LSB to MSB order.
Soft Reset
Setting this bit high resets all SPI registers to
default values.
Reserved
This bit should always be set high.
avoid ambiguity in bit ordering.
Page 20