tda8359j-n2 NXP Semiconductors, tda8359j-n2 Datasheet - Page 7

• Manufacturer Part Number: tda8359j-n2
• Description: Full Bridge Vertical Deflection Output Circuit In Lvdmos
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes
1. To limit V
2. Allowable input range for both inputs: V
3. This value specifies the sum of the voltage losses of the internal current paths between pins V
4. This value specifies the sum of the voltage losses of the internal current paths between pins V
5. The linearity error is measured for a linear input signal without S-correction and is based on the ‘on screen’
6. The linearity errors are specified for a minimum input voltage of 300 mV (p-p). Lower input voltages lead to voltage
7.
8. Pin FEEDB not connected.
9.
10. V
11. This value specifies the internal voltage loss of the current path between pins V
2002 Jan 21
Flyback switch
I
V
Guard circuit
V
V
I
o(peak)
O(grd)
SYMBOL
loss(FB)
O(grd)
O(grd)(max)
Full bridge vertical deflection output circuit
in LVDMOS
and V
between pins OUTB and GND. Specified for T
between pins OUTA and GND. Specified for T
measurement principle. This method is defined as follows. The output signal is divided in 22 successive equal time
parts. The 1st and 22nd parts are ignored, and the remaining 20 parts form 10 successive blocks k. A block consists
of two successive parts. The voltage amplitudes are measured across R
where V
maximum and average voltages respectively. The linearity errors are defined as:
a)
b)
dependent S-distortion in the input stage.
G
G
P(ripple)
v ol
v
LE
LE
=
FB
V
------------------------------------------- -
=
=
=
FEEDB
k
= 500 mV (RMS value); 50 Hz < f
at the first part of the flyback.
V
OUTA
------------------------------------------- -
V
and V
maximum (peak) output current
voltage loss at flyback
guard output voltage
allowable guard voltage
output current
V
V
------------------------- -
V
------------------------------ -
INA
FEEDB
OUTA
k
max
V
–
V
–
avg
to 68 V, V
V
–
avg
k+1
–
V
k
V
–
V
INB
+
–
OUTB
V
are the measured voltages of two successive blocks. V
1
min
V
PARAMETER
OUTB
OUTB
100
100
FB
% (adjacent blocks)
must be 66 V due to the voltage drop of the internal flyback diode between pins OUTA
% (non adjacent blocks)
I(bias)
P(ripple)
+ V
j
j
t
note 11
I
maximum leakage current
I
V
V
O(grd)
L(max)
= 125 C. The temperature coefficient for V
= 125 C. The temperature coefficient for V
O(grd)
O(grd)
i
I
I
< 1 kHz; measured across R
o
o
< 1600 mV and V
1.5 ms
= 1.1 A
= 1.6 A
= 100 A
= 10 A
CONDITIONS
= 0 V; not active
= 4.5 V; active
7
I(bias)
M
, starting at k = 1 and ending at k = 10,
min
V
i
5
1
> 100 mV.
, V
M
MIN.
.
FB
max
and OUTA.
and V
7.5
8
6
TYP.
avg
loss(1)
loss(2)
are the minimum,
Product specification
P
P
and OUTA, and
and OUTB, and
8.5
9
7
18
10
2.5
is a positive value.
is a positive value.
TDA8359J
MAX.
1.8
A
V
V
V
V
mA
A
UNIT