tda8357j-n2 NXP Semiconductors, tda8357j-n2 Datasheet - Page 7

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tda8357j-n2

Manufacturer Part Number
tda8357j-n2
Description
Full Bridge Vertical Deflection Output Circuit In Lvdmos
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Notes
1. To limit V
2. Allowable input range: V
3. This value specifies the sum of the voltage losses of the internal current paths between pins V
4. This value specifies the sum of the voltage losses of the internal current paths between pins V
5. The linearity error is measured for a linear input signal without S-correction and is based on the ‘on-screen’
6. The linearity errors are specified for a minimum input voltage of 300 mV (p-p). Lower input voltages lead to voltage
7.
8. Pin FEEDB not connected.
9.
10. V
11. This value specifies the internal voltage loss of the current path between pins V
2002 May 06
Flyback switch
I
V
Guard circuit
V
V
I
SYMBOL
o(peak)
O(grd)
loss(FB)
O(grd)
O(grd)(max)
Full bridge vertical deflection output circuit
in LVDMOS
and V
between pins OUTB and GND. Specified for T
between pins OUTA and GND. Specified for T
measurement principle. This method is defined as follows. The output signal is divided into 22 successive equal time
blocks k. The 1st and 22nd blocks are ignored, while the voltage amplitudes are measured across R
k = 2 and ending at k = 21, where V
V
a)
b)
dependent S-distortion in the input stage.
G
G
avg
P(ripple)
v ol
v
LE
LE
=
are the minimum, maximum and average voltages respectively. The linearity errors are defined as
FB
V
------------------------------------------- -
=
=
=
FEEDB
= 500 mV (RMS value); 50 Hz < f
at the first part of the flyback.
V
maximum (peak) output current
voltage loss at flyback
guard output voltage
allowable guard voltage
output current
OUTA
------------------------------------------- -
V
V
V
------------------------- -
V
------------------------------ -
INA
FEEDB
OUTA
k
max
V
V
avg
to 68 V, V
V
avg
V
k
V
V
INB
+
OUTB
V
1
min
V
PARAMETER
OUTB
OUTB
(adjacent blocks)
(non adjacent blocks)
I(bias)
FB
must be 66 V due to the voltage drop of the internal flyback diode between pins OUTA
+ V
i
< 1600 mV and V
k
and V
P(ripple)
k+1
j
j
are the measured voltages of two successive blocks. V
= 125 C. The temperature coefficient for V
= 125 C. The temperature coefficient for V
t
note 11
I
maximum leakage current
I
V
V
O(grd)
L(max)
O(grd)
O(grd)
< 1 kHz; measured across R
I
I
o
o
1.5 ms
= 0.7 A
= 1.0 A
I(bias)
= 100 A
= 10 A
= 0 V; not active
= 4.5 V; active
CONDITIONS
7
V
i
> 100 mV for each input.
5
1
M
FB
.
MIN.
and OUTA.
7.5
8
6
TYP.
loss(1)
loss(2)
Product specification
P
P
and OUTA, and
and OUTB, and
is a positive value.
is a positive value.
TDA8357J
8.5
9
7
18
10
2.5
1.2
MAX.
M
min
, starting at
, V
max
UNIT
A
V
V
V
V
mA
A
and

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