tda8357j-n2 NXP Semiconductors, tda8357j-n2 Datasheet - Page 5

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tda8357j-n2

Manufacturer Part Number
tda8357j-n2
Description
Full Bridge Vertical Deflection Output Circuit In Lvdmos
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Notes
1. When the voltage at pin OUTA is more than 70 V the circuit will limit the voltage.
2. Equivalent to 200 pF capacitance discharge through a 0
3. Equivalent to 100 pF capacitance discharge through a 1.5 k resistor.
4. Internally limited by thermal protection at T
THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
2002 May 06
SYMBOL
V
V
V
I
I
V
P
T
T
T
SYMBOL
R
R
n
lu
stg
amb
j
P
FB
n
es
tot
th(j-c)
th(j-a)
Full bridge vertical deflection output circuit
in LVDMOS
supply voltage
flyback supply voltage
DC voltage
DC current
latch-up current
electrostatic handling voltage
total power dissipation
storage temperature
ambient temperature
junction temperature
thermal resistance from junction to case
thermal resistance from junction to ambient
pin OUTA
pin OUTB
pins INA, INB, GUARD and FEEDB
pins OUTA and OUTB
pins INA, INB, GUARD and FEEDB
current into any pin
current out of any pin
PARAMETER
PARAMETER
j
170 C.
note 1
during scan (peak-to-peak value)
at flyback (peak); t
at T
machine model; note 2
human body model; note 3
note 4
5
pin voltage = 1.5
pin voltage = 1.5
j(max)
resistor.
in free air
CONDITIONS
CONDITIONS
1.5 ms
V
V
P
P
MIN.
0.5
20
200
350
4000 +4000 V
55
25
VALUE
Product specification
65
6
TDA8357J
18
68
68
V
V
2.0
+20
+200
+350
8
+150
+85
150
MAX.
1.2
P
P
UNIT
K/W
K/W
V
V
V
V
V
A
A
mA
mA
mA
V
W
UNIT
C
C
C

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