tda8034at NXP Semiconductors, tda8034at Datasheet - Page 4
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tda8034at
Manufacturer Part Number
tda8034at
Description
Smart Card Interface
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8034AT.pdf
(29 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tda8034at/C1
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
7. Pinning information
Table 3.
[1]
[2]
[3]
[4]
TDA8034T_TDA8034AT_1
Product data sheet
Symbol
XTAL1
XTAL2
V
RSTIN
CMDVCCN 5
CLKDIV1
PRESN
I/O
GND
CLK
RST
V
V
V
OFFN
I/OUC
DD(INTF)
CC
DDP
DD
I = input, O = output, I/O = input/output, G = ground and P = power supply.
If pin PRESN is HIGH, the card is considered to be present. During card insertion, debouncing can occur on these signals. To counter
this, the TDA8034T/TDA8034AT has a built-in debouncing timer (typically 4.5 ms).
Uses an internal 11 k pull-up resistor connected to pin V
Using a 220 nF capacitor increases the noise margin on pin V
Pin description
Pin Supply
1
2
3
4
6
7
8
9
10
11
12
13
14
15
16
7.1 Pinning
7.2 Pin description
V
V
V
V
V
V
V
V
-
V
V
V
V
V
V
V
DD
DD
DD(INTF)
DD(INTF)
DD(INTF)
DD(INTF)
DD(INTF)
CC
CC
CC
CC
DDP
DD
DD(INTF)
DD(INTF)
Fig 2.
Type
I
O
P
I
I
I
I
I/O
G
O
O
P
P
P
O
I/O
[1]
Pin configuration (SO16)
Description
crystal connection input
crystal connection output
interface supply voltage
microcontroller card reset input; active HIGH
microcontroller start activation sequence input; active LOW
sets the clock frequency on pin CLK; see
card presence contact input; active LOW
card input/output data line (C7)
ground
card clock (C3)
card reset (C2)
card supply (C1); decouple to pin GND using one 470 nF capacitor close to pin V
and one 220 nF capacitor close to card socket contact C1 with an ESR < 100 m
low-dropout regulator input supply voltage
digital supply voltage
NMOS interrupt to microcontroller
microcontroller input/output data line
Rev. 01 — 5 February 2010
CC
CMDVCCN
V
CLKDIV1
.
DD(INTF)
PRESN
CC
XTAL1
XTAL2
RSTIN
.
I/O
1
2
3
4
5
6
7
8
[3]
TDA8034T; TDA8034AT
TDA8034AT
TDA8034T
[5]
; active LOW; see
[3]
001aak990
[2]
Table 4 on page 7
16
15
14
13
12
11
10
9
I/OUC
OFFN
V
V
V
RST
CLK
GND
DD
DDP
CC
Section 8.9 on page 10
Smart card interface
© NXP B.V. 2010. All rights reserved.
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CC
[4]