tda8023 NXP Semiconductors, tda8023 Datasheet - Page 22

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tda8023

Manufacturer Part Number
tda8023
Description
Tda8023 Low Power Ic Card Interface
Manufacturer
NXP Semiconductors
Datasheet

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Table 20.
V
[1]
[2]
Table 21.
V
[1]
TDA8023_1
Product data sheet
Symbol
I
f
t
t
t
t
t
t
t
t
t
t
Symbol
T
T
I
I
2
SCL
BUF
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
r
f
SU;STO
Ilim
Olim
DD
DD
amb
sd
C-bus timing; see
= 3.3 V; V
Pin I/OUC has an internal 11 k pull-up resistor to V
The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by
a transmitter.
= 3.3 V; V
Pin I/O has an internal 15 k pull-up resistor to V
Parameter
SCL clock frequency
bus free time between a STOP
and START condition
hold time (repeated) START
condition
LOW period of the SCL clock
HIGH period of the SCL clock
set-up time for a repeated
START condition
data hold time
data set-up time
rise time of both SDA and SCL
signals
fall time of both SDA and SCL
signals
set-up time for STOP condition
Parameter
ambient temperature
shutdown temperature
input current limit
output current limit
Interface signals to host controller
Protection and limitations
DD(INTF)
DD(INTF)
Figure 7
= 1.5 V; f
= 1.5 V; f
CLKIN
CLKIN
= 10 MHz; GND = 0 V; T
= 10 MHz; GND = 0 V; T
Conditions
hold time after which first
clock pulse is generated
Conditions
at die
on pin I/O
on pin I/O
on pin CLK
shutdown current; on pin RST
shutdown current; on pin V
CC
…continued
.
DD(INTF)
Rev. 01 — 16 July 2007
.
amb
amb
= 25 C; unless otherwise specified.
= 25 C; unless otherwise specified.
CC
[2]
Min
0
1.3
0.6
1.3
0.6
0.6
0
100
-
-
0.6
Low power IC card interface
[1]
[1]
Typ
-
-
-
-
-
-
-
-
-
-
-
Min
-
-
40
15
15
70
20
Max
400
-
-
-
-
-
-
-
300
300
-
Typ
-
150
-
-
-
-
TDA8023
90
© NXP B.V. 2007. All rights reserved.
Max
+85
-
+15
+15
+70
+20
-
22 of 32
Unit
kHz
ns
ns
ns
ns
Unit
mA
mA
mA
mA
mA
C
C
s
s
s
s
s
s

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