tda8594sd-n1 NXP Semiconductors, tda8594sd-n1 Datasheet
tda8594sd-n1
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tda8594sd-n1 Summary of contents
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TDA8594 2 I C-bus controlled 4 Rev. 02 — 11 December 2007 1. General description The TDA8594 is a complementary quad Bridge Tied Load (BTL) audio power amplifier made in BCDMOS technology. It contains four independent amplifiers in BTL configuration. ...
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... DIAG pin 3. Quick reference data Table 1. Symbol THD V n(o) 4. Ordering information Table 2. Type number Package TDA8594J TDA8594SD TDA8594_2 Product data sheet Quick reference data Parameter Conditions supply voltage quiescent current no load output power THD = 0.5 % ...
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... NXP Semiconductors 5. Block diagram STB IN1 IN3 IN2 IN4 Fig 1. Block diagram TDA8594_2 Product data sheet ADSEL SDA SCL STANDBY/ I C-BUS FAST MUTE INTERFACE 12 MUTE 16 MUTE 13 MUTE 15 MUTE V P TDA8594 11 14 SVR SGND ACGND Rev. 02 — 11 December 2007 TDA8594 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration 6.2 Pin description Table 3. Symbol ADSEL STB PGND2 OUT2 DIAG OUT2 TDA8594_2 Product data sheet ADSEL 1 STB 2 3 PGND2 4 OUT2 DIAG 5 OUT2 OUT1 8 PGND1 9 OUT1 SVR IN1 12 IN2 13 14 ...
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... NXP Semiconductors Table 3. Symbol OUT1 PGND1 OUT1+ SVR IN1 IN2 SGND IN4 IN3 ACGND OUT3+ PGND3 OUT3 V P1 OUT4+ SCL OUT4 PGND4 SDA TAB To keep the output pins on the front side, special reverse bending is applied. 7. Functional description The TDA8594 is a complementary quad BTL audio power amplifier made in BCDMOS technology. It contains four independent amplifi ...
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... NXP Semiconductors 7.2 Output stage The output stage of each amplifier channel consists of two PMOS power transistors and two NMOS transistors in a BTL configuration. The process used is the BCDMOS process with an isolated substrate, Silicon On Insulator (SOI) process, which has almost no parasitic components and therefore prevents latch-up. ...
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... NXP Semiconductors 7.7 Standby and mute operation The function of the STB pin is different in legacy mode and I 7.7.1 Legacy mode (pin ADSEL connected to ground) The function of the STB pin will change from standby/operating to standby/mute/operating and the amplifier will start directly when the STB is put into mute or operating mode. Mute operating is controlled via an internal timer (20 ms) to minimize mute-on pops. When the STB pin is switched directly from operating to standby, fi ...
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... NXP Semiconductors V P DIAG DB2 bit D7 POR IB1 bit D0 start enable t wake STB SVR t amp_on amplifier output t d(mute_off) Fig 3. Start-up and shut-down timing in I TDA8594_2 Product data sheet 2 I C-bus controlled 4 t d(soft_mute) 2 C-bus mode Rev. 02 — 11 December 2007 TDA8594 50 W power amplifier ...
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... NXP Semiconductors V P DIAG DB2 bit D7 POR IB1 bit D0 start enable t wake STB SVR t t amp_on amplifier output t d(mute_off) Fig 4. Start-up and shut-down timing with DC load active in I TDA8594_2 Product data sheet load t d(soft_mute) 2 Rev. 02 — 11 December 2007 2 I C-bus controlled power amplifi ...
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... NXP Semiconductors V P DIAG DB2 bit D7 POR IB1 bit D0 start enable t wake STB SVR t load t amp_on amplifier output t d(mute_off) Fig 5. Start-up and shut-down timing with low audible pop and DC load activated TDA8594_2 Product data sheet 2 I C-bus controlled 4 t d(soft_mute) Rev. 02 — 11 December 2007 TDA8594 50 W power amplifi ...
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... NXP Semiconductors V P DIAG on STB mute standby SVR t amp_on amplifier output t d(mute_off) Fig 6. Start-up and shut-down timing in legacy mode 7.9 Power-on reset and supply voltage spikes C-bus mode the supply voltage drops below 5 V (see 2 I C-bus latches cannot be guaranteed and the power-on reset will be activated. All latches are reset, the amplifi ...
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... NXP Semiconductors When the SVR capacitor has discharged, the amplifier starts up again if the V above the low V outputs of the amplifier remain low typically 5 V, results in setting bit DB2[D7] and not starting of the amplifiers but waiting for C-bus command to start. ...
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... NXP Semiconductors 2 V legacy and I C-bus mode O (V) 14.4 8.8 8.6 7.2 3.5 output voltage (1) Headroom protection activated: a) Fast mute b) Discharge of SVR. (2) Low V mute activated. P (3) Low V mute released. P Fig 8. Low V behavior; legacy and I P TDA8594_2 Product data sheet (2) V SVR t (start-Vo(off)) t (start-SVRoff) ...
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... NXP Semiconductors C-bus mode only O (V) 14.4 8.8 8.6 7.2 5.0 3.5 output voltage 0 POR IB1 bit D0 DIAG (1) Low V mute activated level at which Power-On Reset (POR) is activated. POR P 2 Fig 9. Low V behavior; I C-bus mode only P 7.11 Overvoltage and load dump protection When the battery voltage V high-impedance ...
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... NXP Semiconductors G (dB) Fig 10. Temperature controlled amplifier gain 7.13 Diagnostics Diagnostic information can be read via the I pin or on the STB pin. The DIAG pin has both fixed information (power-on reset occurred, low battery and high battery) and, via the I load fault and clip). This information will be seen at the DIAG pin as a logic OR. In case of ...
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... NXP Semiconductors Table 4. Diagnostic information I Offset detection Load detection Overvoltage 7.14 Offset detection The offset detection can be performed with no input signal (for instance when the digital signal processor is in mute after a start-up) or with an input signal C-bus read of the output offset is performed, the I When the amplifi ...
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... NXP Semiconductors Fig 12. DC load detection levels If the amplifier is used as line driver and the external booster has an input impedance of more than 100 DBx[D5:D4] = 10, independent of the gain setting (see Table 5. DC load bits DBx[D5 reading the I amplifier, whether a speaker or an external booster is connected. ...
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... NXP Semiconductors The interpretation of line driver and normal mode DC load bit settings for AC load detection is shown in Table 6. DBx[D4 When bit IB1[D2 the AC load detection is enabled. The AC load detection can only be performed after the amplifier has completed its start-up cycle and will not conflict with the DC load detection ...
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... NXP Semiconductors C-bus specification Table 7. Pin ADSEL Open ground ground Ground SDA SCL Fig 14. Definition of START and STOP conditions Fig 15. Bit transfer TDA8594_2 Product data sheet TDA8594 hardware address select ...
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... NXP Semiconductors 2 I C-BUS WRITE SCL 1 2 MSB MSB 1 SDA S ADDRESS 2 I C-BUS READ SCL 1 2 MSB MSB 1 SDA S ADDRESS : generated by master (microcontroller) : generated by slave S : START P : STOP A : acknowledge NA : not acknowledge R/W : read / write 2 Fig 16. I C-bus read and write modes 8.1 Instruction bytes ...
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... NXP Semiconductors Table 8. Bit Table 9. Bit D7 and TDA8594_2 Product data sheet Instruction byte IB1 …continued Description channel 4 clip information on DIAG or STB pin 0 = clip information on DIAG pin 1 = clip information on STB pin channel 2 clip information on DIAG or STB pin ...
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... NXP Semiconductors Table 9. Bit D0 Table 10. Bit 8.2 Data bytes 2 I C-bus mode: • If bit R the TDA8594 sends four data bytes to the microprocessor: DB1, DB2, DB3, and DB4 • All bits except DB1[D7] and DB3[D7] are latched. • All bits except DBx[D4] and DBx[D5] are reset after a read operation. Bit DBx[D2] is set after a read operation ...
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... NXP Semiconductors Table 11. Bit and Table 12. Bit D7 D6 TDA8594_2 Product data sheet Data byte DB1 Description temperature pre-warning warning 1 = junction temperature too high speaker fault channel 2 (missing current missing current 1 = missing current channel 2 DC load or AC load detection if bit IB1[D2 load detection is enabled, bit D5 is don’ ...
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... NXP Semiconductors Table 12. Bit D5 and Table 13. Bit D7 D6 TDA8594_2 Product data sheet Data byte DB2 …continued Description channel 4 DC load or AC load detection if bit IB1[D2 load detection is enabled, bit D5 is don’t care, bit D4 has the following meaning ...
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... NXP Semiconductors Table 13. Bit D5 and Table 14. Bit and D4 TDA8594_2 Product data sheet Data byte DB3 …continued Description channel 1 DC load or AC load detection if bit IB1[D2 load detection is enabled, bit D5 is don’t care, bit D4 has the following meaning ...
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... NXP Semiconductors Table 14. Bit Limiting values Table 15. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol P(r) I OSM I ORM T j(max) T stg T amb V (prot TDA8594_2 Product data sheet Data byte DB4 …continued Description channel 3 shorted load ...
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... NXP Semiconductors Table 15. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol P tot V esd 10. Thermal characteristics Table 16. Symbol R th(j-c) R th(j-a) 11. Characteristics Table 17. Characteristics Refer to Figure Tested guaranteed for T amb Symbol Parameter Supply voltage behavior V supply voltage ...
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... NXP Semiconductors Table 17. Characteristics …continued Refer to Figure Tested guaranteed for T amb Symbol Parameter Mode select and second clip detection: pin STB V voltage on pin STB STB I current on pin STB STB Start-up, shut-down and mute timing t wake-up time ...
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... NXP Semiconductors Table 17. Characteristics …continued Refer to Figure Tested guaranteed for T amb Symbol Parameter t amplifier on time amp_on t amplifier switch-off time off t mute to on delay time d(mute-on) t soft mute delay time d(soft_mute) t fast mute delay time ...
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... NXP Semiconductors Table 17. Characteristics …continued Refer to Figure Tested guaranteed for T amb Symbol Parameter f SCL clock frequency SCL R resistance on pin ADSEL ADSEL Diagnostic V LOW-level output voltage on OL(DIAG) pin DIAG V output voltage at offset O(offset_det) detection THD total harmonic distortion clip ...
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... NXP Semiconductors Table 17. Characteristics …continued Refer to Figure Tested guaranteed for T amb Symbol Parameter Amplifier P output power o THD total harmonic distortion channel separation cs SVRR supply voltage ripple rejection 100 kHz; R CMRR common mode rejection ratio normal mode; V ...
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... NXP Semiconductors Table 17. Characteristics …continued Refer to Figure Tested guaranteed for T amb Symbol Parameter Z input impedance i mute attenuation mute V RMS mute output voltage o(mute)(RMS) B power bandwidth p [1] Operation above mode with reactive load can trigger the amplifier protection. The amplifier switches off and will restart after 16 ms resulting in an ‘ ...
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... NXP Semiconductors THD (%) ( kHz. ( kHz. ( 100 Hz. Fig 18. Total harmonic distortion as a function of output power P (W) (1) THD = 10 %. (2) THD = 0.5 %. Fig 19. Output power as a function of frequency TDA8594_2 Product data sheet 14 ...
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... NXP Semiconductors P (W) (1) THD = 10 %. (2) THD = 0.5 %. Fig 20. Output power as a function of frequency P (W) (1) P (2) THD = 10 %. (3) THD = 0.5 %. Fig 21. Output power as a function of supply voltage TDA8594_2 Product data sheet 14 14 ...
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... NXP Semiconductors P (W) (1) P (2) THD = 10 %. (3) THD = 0.5 %. Fig 22. Output power as a function of supply voltage THD (%) (1) P (2) P Fig 23. Total harmonic distortion as a function of frequency; in normal mode TDA8594_2 Product data sheet 120 14 o(max (1) ...
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... NXP Semiconductors THD (%) (1) V (2) V Fig 24. Total harmonic distortion as a function of frequency in line driver mode SVRR (dB) Fig 25. Supply voltage ripple rejection as a function of frequency TDA8594_2 Product data sheet 14 600 . front channels ...
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... NXP Semiconductors (dB) Fig 26. Channel separation as a function of frequency (W) Fig 27. Power dissipation as a function of output power TDA8594_2 Product data sheet 14 14 kHz Rev. 02 — 11 December 2007 ...
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... NXP Semiconductors (W) Fig 28. Power dissipation as a function of output power TDA8594_2 Product data sheet 100 14 kHz Rev. 02 — 11 December 2007 TDA8594 2 I C-bus controlled power amplifier 001aad731 (W) o © NXP B.V. 2007. All rights reserved. ...
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... NXP Semiconductors 13. Application information 8 STB 2 470 IN1 12 (1) 1.8 nF 470 IN3 16 (1) 1.8 nF 470 IN2 13 (1) 1.8 nF 470 IN4 15 (1) 1.8 nF For EMC reasons capacitor (not shown) can be added from each amplifier output to ground. (1) For EMC reasons a capacitor of 1.8 nF from the input pin to SGND is advised (optional). ...
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... NXP Semiconductors Fig 30. Beep input circuit (gain = 0 dB) to apply a microprocessor beep signal to all four Fig 31. Complex loads for measuring THD in line driver mode Fig 32. Circuit for combined mode selection and clip detection functions on pin STB TDA8594_2 Product data sheet 1.7 k MICRO- PROCESSOR amplifi ...
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... NXP Semiconductors 13.1 PCB layout Fig 33. PCB layout of test and application circuit; copper layer top Fig 34. PCB layout of test and application circuit; copper layer bottom (top view) TDA8594_2 Product data sheet 2 I C-bus controlled 4 top Rev. 02 — 11 December 2007 TDA8594 50 W power amplifier ...
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... NXP Semiconductors clip 2 mode on diag Mute off Fig 35. PCB layout of test and application circuit; components top Fig 36. PCB layout of test and application circuit; components bottom (top view) 14. Test information 14.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q100 - Stress test qualifi ...
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... NXP Semiconductors 15. Package outline DBS27P: plastic DIL-bent-SIL (special bent) power package; 27 leads (lead length 6.8 mm DIMENSIONS (mm are the original dimensions) (1) UNIT 4.65 0.60 0.5 29 4.35 0.45 0.3 28.8 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION ...
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... NXP Semiconductors RDBS27P: plastic rectangular-DIL-bent-SIL (reverse bent) power package; 27 leads (row spacing 2.54 mm DIMENSIONS (mm are the original dimensions) UNIT 4.65 0.60 0.5 29.2 mm 13.5 4.35 0.45 0.3 28.8 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included OUTLINE VERSION IEC SOT878-1 Fig 38. Package outline SOT878-1 (RDBS27P) ...
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... NXP Semiconductors 16. Mounting Fig 39. SOT878-1 reflow soldering footprint 17. Abbreviations Table 18. Acronym ACK BCDMOS BTL CMOS DMOS DSP EMC ESR LSB MSB NMOS PMOS PCB POR SOAR SOI TDA8594_2 Product data sheet hole diameter min. 0.92 Dimensions in mm. Reflow soldering is the recommended soldering method. ...
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... Document ID Release date TDA8594_2 20071211 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 2.1 • Figure 1 • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 2.2 I C-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.3 Distortion (clip) detection . . . . . . . . . . . . . . . . . 6 7.4 Output protection and short-circuit operation . . 6 7 ...