tda8752ah/6 NXP Semiconductors, tda8752ah/6 Datasheet - Page 2

• Manufacturer Part Number: tda8752ah/6
• Description: Triple High-speed Analog-to-digital Converter Adc
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FEATURES
APPLICATIONS
ORDERING INFORMATION
1999 Feb 24
TDA8752AH/6
TDA8752AH/8
TYPE NUMBER
Triple 8-bit ADC
Sampling rate up to 100 MHz
IC controllable via a serial interface, which can be either
I
IC analog voltage input from 0.4 to 1.2 V (p-p) to
produce full-scale ADC input of 1 V (p-p)
3 clamps for programming a clamping code between
3 controllable amplifiers: gain controlled via the serial
interface to produce a full scale resolution of
peak-to-peak
Amplifier bandwidth of 250 MHz
Low gain variation with temperature
PLL, controllable via the serial interface to generate the
ADC clock, which can be locked to a line frequency from
15 to 280 kHz
Integrated PLL divider
Programmable phase clock adjustment cells
Internal voltage regulators
TTL compatible digital inputs and outputs
Chip enable high-impedance ADC output
Power-down mode
Possibility to use up to four ICs in the same system,
using the I
serial interface
1 W power dissipation.
R, G and B high-speed digitizing
LCD panels drive
LCD projection systems
VGA and higher resolutions
Using two ICs in parallel, higher display resolution can
be obtained; 200 MHz pixel frequency.
Triple high-speed Analog-to-Digital
Converter (ADC)
2
63.5 and +64 in steps of
C-bus or 3-wire, selected via a TTL input pin
2
C-bus interface, or more, using the 3-wire
QFP100 plastic quad flat package; 100 leads (lead length
NAME
1
2
LSB
1.95 mm); body 14
1
2
LSB
DESCRIPTION
20
PACKAGE
2.8 mm
2
GENERAL DESCRIPTION
The TDA8752A is a triple 8-bit ADC with controllable
amplifiers and clamps for the digitizing of large bandwidth
RGB signals.
The clamp level, the gain and all of the other settings are
controlled via a serial interface (either I
serial bus, selected via a logic input).
The IC also includes a PLL that can be locked on the
horizontal line frequency and generates the ADC clock.
The PLL jitter is minimized for high resolution PC graphics
applications. An external clock can also be input to the
ADC.
It is possible to set the TDA8752A serial bus address
between four fixed values, in the event that several
TDA8752A ICs are used in a system, using the I
interface (for example, two ICs used in an odd/even
configuration).
SOT317-2
VERSION
Product specification
TDA8752A
2
C-bus or 3-wire
FREQUENCY
SAMPLING
(MHz)
100
60
2
C-bus