adc1443d NXP Semiconductors, adc1443d Datasheet - Page 29

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adc1443d

Manufacturer Part Number
adc1443d
Description
Dual Channel 14-bit Adc; 125, 160 Or 200 Msps; Jesd204b-compliant Cgvxpress Serial Outputs
Manufacturer
NXP Semiconductors
Datasheet

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ADC1443D_SER
Objective data sheet
11.3.5 Test patterns
11.3.6 Output data format selection
11.3.7 Output codes versus input voltage
The ADC1443D can be configured to transmit one of a number of predefined test patterns
using the SPI local registers (bits TEST_PAT_SEL[2:0] in
selected test pattern is transmitted regardless of the analog input.
Table 14.
Default values are shown highlighted.
A custom test pattern can be defined using the SPI local registers
(bits TEST_PAT_USER[13:6] in
The ADC1443D output data format can be selected (offset binary, two’s complement or
gray code) using the SPI local registers (bits DATA_FORMAT[1:0] in
Table 15.
TEST_PAT_SEL[2:0]
000
001
010
011
100
101
110
111
V
< 1
1
0.99987793
0.99975586
...
0.00024414
0.00012207
+0.00012207
+0.0.00024414 10 0000 0000 0001
...
+0.99975586
+0.99987793
+1
> +1
INP
 V
INM
Digital test pattern selection
Output codes
All information provided in this document is subject to legal disclaimers.
Offset binary
00 0000 0000 0000
00 0000 0000 0000
00 0000 0000 0001
00 0000 0000 0010
...
01 1111 1111 1110
01 1111 1111 1111
10 0000 0000 0000
...
11 1111 1111 1101
11 1111 1111 1110
11 1111 1111 1111
11 1111 1111 1111
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
Rev. 1 — 28 September 2011
Table 29
Two’s complement
10 0000 0000 0000
10 0000 0000 0000
10 0000 0000 0001
00 0000 0000 0010
...
11 1111 1111 1110
11 1111 1111 1111
00 0000 0000 0000
00 0000 0000 0001
...
01 1111 1111 1101
01 1111 1111 1110
01 1111 1111 1111
01 1111 1111 1111
and bits TEST_PAT_USER[5:0] in
Digital test pattern
Off
Mid code
Min code
Max code
Toggle ‘1111..1111’/’0000..0000’
Custom test pattern
‘1010..1010’
‘0101..0101’
ADC1443D series
Table 14
Gray code
00 0000 0000 0000
00 0000 0000 0000
00 0000 0000 0001
00 0000 0000 0011
...
01 0000 0000 0001
01 0000 0000 0000
11 0000 0000 0000
11 0000 0000 0001
...
10 0000 0000 0011
10 0000 0000 0001
10 0000 0000 0000
10 0000 0000 0000
and
Table
© NXP B.V. 2011. All rights reserved.
Table
26).
Table
28). The
30).
29 of 50
0
0
0
0
0
OTR
1
0
0
0
0
0
0
0
1

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