adc0808s125 NXP Semiconductors, adc0808s125 Datasheet
adc0808s125
Available stocks
Related parts for adc0808s125
adc0808s125 Summary of contents
Page 1
... ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Rev. 02 — 7 October 2008 1. General description The ADC0808S is a differential, high-speed, 8-bit Analog-to-Digital Converter (ADC) optimized for telecommunication transmission control systems and tape drive applications. It allows signal sampling frequencies up to 250 MHz. ...
Page 2
... RESISTOR AND 32 LADDERS INN HOLD 30 U/I INTERNAL CMADC REFERENCE REFERENCE 29 CMADC Block diagram Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz 7 1 mm; exposed die pad CLKSEL CLK+ CLK CLOCK DRIVER LATCH 8 8 LATCH ADC CORE LATCH ...
Page 3
... data output bit internally connected; leave open 13 P data output supply voltage 3 (1 data output bit 7 Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz 36 CLKSEL 35 i. CCA1(3V3 INN 31 ...
Page 4
... Table 3. Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Description internally connected; leave open data output ground 3 complete conversion signal output internally connected; leave open chip enable input (active LOW) in-range output control input for 2’s complement output digital ground 1 digital supply voltage 1 (1 ...
Page 5
... V CMOS level output power supply ground and 120 V O(dif) LVDS DRIVER V gpd Figure 4. CMOS DRIVER Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz is required; see Figure 3. maximum V idth undefined state minimum V idth RECEIVER CLK+ CLK 001aah720 CLK+ ...
Page 6
... Output format selection Chip enable Pin CE_N LOW LOW HIGH Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Clock input signal Pins CLK+ and CLK LVDS 1.8 V CMOS Output Outputs Pin IR Binary 2’s complement LOW ...
Page 7
... Output timing diagram (CCS not selected) Complete conversion signal selection Pin DEL1 Pin CCS LOW high-impedance LOW active; see HIGH HIGH Complete conversion signal frequency selection Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz sample sample d(o) data data ...
Page 8
... Full-scale input selection Common-mode output voltage V O(cm) 0.8 V 0.86 V 0.94 V 1. pin CMADC will then be 0.95 V, and the O(cm) i(p-p)(max) Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz data data data 001aab893 Maximum peak-to-peak input voltage V i(p-p)(max) 1 ...
Page 9
... ADC common-mode output voltage V 2.2 2.1 2.0 1.9 1.8 1.0 1.1 ADC maximum peak-to-peak input voltage V analog input 1. 1.35 V FSIN/REFSEL 0 1.1 V CMADC b. Internal reference circuit enabled Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz 001aai270 1.2 1.3 V (V) FSIN as a function of V O(cm) FSIN 001aai269 1.2 1.3 V (V) FSIN ...
Page 10
... MHz 1.25 MHz clk 125 MHz 1.25 MHz clk pin CLK+ or CLK ; < gpd Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Conditions Min 0.5 0.5 0.5 referenced to AGND 0.5 referenced to AGND 0.5 referenced to DGND 0 Conditions [1] [ ...
Page 11
... V = 0.7V IH CCD [3] internal reference external reference internal reference external reference V = 1.15 V FSIN V = 1.25 V FSIN V = 1.35 V FSIN Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz = 0 V; typical values are measured at FSIN Min Typ [2] 100 - - - DGND - 0.8V - CCD - - - ...
Page 12
... MHz clk f = 125 MHz MHz clk 250 MHz 125 MHz clk i Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz = 0 V; typical values are measured at FSIN Min Typ Max - - 1 250 - - 1 ...
Page 13
... where M = number of cycles and N = number of samples Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz = 0 V; typical values are measured at FSIN Min Typ ...
Page 14
... P signal = 10log --------------------------------------- - 10 P noise + distortion SINAD 1.76 – ---------------------------------- 6.02 P harmonics = 10log ------------------------ - 10 P signal Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz SFDR frequency 001aag627 t © NXP B.V. 2008. All rights reserved ...
Page 15
... Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz frequency and and f are chosen according to the 1 2 © NXP B.V. 2008. All rights reserved. ...
Page 16
... Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz – ...
Page 17
... 2.5 scale (1) ( 0.20 7.1 4.6 7.1 4.6 0.5 0.09 6.9 4.4 6.9 4.4 REFERENCES JEDEC JEITA MS-026 Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz detail 9.1 9.1 0.75 1 0.2 0.08 0.08 8.9 8.9 0.45 EUROPEAN PROJECTION SOT545-2 ...
Page 18
... Solder bath specifications, including temperature and impurities ADC0808S125_ADC0808S250_2 Product data sheet ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Rev. 02 — 7 October 2008 © NXP B.V. 2008. All rights reserved ...
Page 19
... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 13. Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Figure 13) than a SnPb process, thus 350 220 220 350 to 2000 > 2000 260 260 250 ...
Page 20
... MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz peak temperature © NXP B.V. 2008. All rights reserved. time 001aac844 ...
Page 21
... Table 13 updated. • Table 2; pin 30 updated to full-scale reference voltage input/internal or external reference selection. 20060609 Objective data sheet Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz Change notice Supersedes - TDA9917_1 added © NXP B.V. 2008. All rights reserved. ...
Page 22
... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 7 October 2008 ADC0808S125/250 Single 8-bit ADC 125 MHz or 250 MHz © NXP B.V. 2008. All rights reserved ...
Page 23
... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: ADC0808S125_ADC0808S250_2 All rights reserved. Date of release: 7 October 2008 ...