cs5317 Cirrus Logic, Inc., cs5317 Datasheet - Page 14

no-image

cs5317

Manufacturer Part Number
cs5317
Description
16-bit, 20 Khz Oversampling A/d Converter
Manufacturer
Cirrus Logic, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
cs5317-KD
Manufacturer:
CRYSTAL
Quantity:
159
Part Number:
cs5317-KP
Manufacturer:
CRYSTAL
Quantity:
5 510
Part Number:
cs5317-KP
Manufacturer:
CRYSTAL
Quantity:
364
Part Number:
cs5317-KS
Quantity:
15
Part Number:
cs5317-KS
Manufacturer:
CS
Quantity:
20 000
Part Number:
cs5317-KSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
cs5317KP
Quantity:
4
In some applications additional filtering may be
useful to eliminate any jitter associated with the
discrete current pulses from the phase detector.
In this case a capacitor whose value is no more
than 0.1 C can be placed across the RC filter net-
work (C
Filter Design Example
The following is a step by step example of how to
derive the loop filter components. The CS5317
A/D sampling clock is to be derived from a 9600
Hz clock source. The application requires the sig-
nal passband of the CS5317 to be 4 kHz. The
on-chip digital filter of the CS5317 has a 3 dB
passband of CLKOUT/488.65 (see Note 4 in the
data sheet specifications tables). The 4 kHz pass-
band requirement dictates that the sample clock
(CLKOUT) of the CS5317 be a minimum of
4000 X 488.65 = 1.954 MHz. This requires the
VCO to run at 3.908 MHz. The 3.908 MHz rate is
407 times greater than the 9600 Hz PLL input
clock. Therefore the CS5317 must be set up in
mode CLKG2 with N = 512. If the CLKG1 mode
were used (N = 256), too narrow of a signal band-
width through the A/D would result.
Once the operating mode has been determined
from the system requirements, a value for the
damping factor must be chosen. Figure 6 illus-
trates the dynamic aspects of the system with a
given damping factor. Damping factor is gener-
ally chosen to be between 0.5 and 2.0. The choice
of 0.5 will result in an overshoot of 30 % to a step
response whereas the choice of 2.0 will result in
an overshoot of less than 5 %. For example pur-
poses, let us use a damping factor of 1.0.
So, let us begin with the following variables :
Ko = - 10 Mradians/volt.sec
Kd = - 8 A/radian
N = 512
14
= 1.0
2
in Figure 5).
To calculate values for the resistor R and capaci-
tor C of the filter, we must first derive a value for
should be at least 20 times higher frequency than
the 3dB bandwidth of the PLL control loop:
CLKIN 20
where CLKIN = 9600 Hz = 2 9600 radians/sec.
So:
Knowing
can calculate the natural frequency,
control loop:
Once the natural frequency,
values for R and C for the loop filter can be cal-
culated:
R = 2
R = 2(1)(1215 1/s) 512/(-10Mrad/v.s.)(-8 A/rad)
R = 15552 v/A = 15.55 k . Use R = 15 k .
C = KoKd/N
C = (-10 Mrad/v.s)(- 8 A/rad)/512 (1215 1/s)
C = 105.8 x 10
The above example assumed typical values for
Ko and Kd. Your application may require a worst
case analysis which includes the minimum or
maximum values. Table 2 shows some other ex-
ample situations and R and C values.
n
. Using the general rule that the sample clock
n
n
n
3dB
n
3016 2 1
1215
N/KoKd
= 2 9600/20 = 3016 radians/sec.
3dB
3dB
n
3dB
and the damping factor of 1.0, we
2
-9
2
A.s/v = 105 nF.
1 sec
2
2
1
1
2
2 1
2
n
, is determined,
1
2
2
Use 0.1 F.
CS5317
1
n
1
2
, of the
DS27F4
1
2

Related parts for cs5317