m48t128y STMicroelectronics, m48t128y Datasheet - Page 7

• Manufacturer Part Number: m48t128y
• Description: 5.0 Or 3.3v, 1 Mbit 128 Kb X 8 Timekeeper Sram
• Manufacturer: STMicroelectronics

READ Mode
The M48T128Y/V is in the READ Mode whenever
W (WRITE Enable) is high and E (Chip Enable) is
low. The unique address specified by the 17 Ad-
dress Inputs defines which one of the 131,072
bytes of data is to be accessed.
Valid data will be available at the Data I/O pins
within t
address input signal is stable, providing the E and
G access times are also satisfied. If the E and G
access times are not met, valid data will be avail-
Figure 5. READ Mode AC Waveforms
Note: WE = High.
Table 3. READ Mode AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
Symbol
t
t
t
t
GHQZ
GLQX
EHQZ
ELQX
t
t
t
t
t
GLQV
AXQX
2. C
AVQV
ELQV
AVAV
AVQV
(2)
(2)
(2)
L
(2)
= 5pF.
A0-A16
E
G
DQ0-DQ7
(Address Access Time) after the last
READ Cycle Time
Address Valid to Output Valid
Chip Enable Low to Output Valid
Output Enable Low to Output Valid
Chip Enable Low to Output Transition
Output Enable Low to Output Transition
Chip Enable High to Output Hi-Z
Output Enable High to Output Hi-Z
Address Transition to Output Transition
Parameter
tAVQV
tELQX
(1)
tELQV
tGLQX
A
= 0 to 70°C; V
tGLQV
tAVAV
VALID
CC
able after the latter of the Chip Enable Access
Times (t
(t
signals is controlled by E and G. If the outputs are
activated before t
to an indeterminate state until t
dress Inputs are changed while E and G remain
active, output data will remain valid for t
put Data Hold Time) but will go indeterminate until
the next Address Access.
= 4.5 to 5.5V or 3.0 to 3.6V (except where noted).
GLQV
Min
70
10
). The state of the eight three-state Data I/O
5
5
M48T128Y
ELQV
DATA OUT
–70
) or Output Enable Access Time
Max
tAXQX
70
70
40
25
25
AVQV
tGHQZ
, the data lines will be driven
M48T128Y, M48T128V*
Min
85
5
5
5
M48T128V
–85
AVQV
Max
tEHQZ
85
85
55
30
30
AI01197
. If the Ad-
AXQX
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Out-
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