m41st85w STMicroelectronics, m41st85w Datasheet - Page 24

• Manufacturer Part Number: m41st85w
• Description: 3.0/3.3v I 2c Combination Serial Rtc, Nvram Supervisor And Microprocessor Supervisor
• Manufacturer: STMicroelectronics

Figure 16. Back-up mode alarm waveform
3.5
Note:
Note:
24/41
V CC
V PFD
V SO
ABE, AFE Bits in Interrupt Register
AF bit in Flags Register
IRQ/FT/OUT
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the Watchdog
Register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order
bits RB1-RB0 select the resolution, where 00=1/16 second, 01=1/4 second, 10=1 second,
and 11=4 seconds. The amount of time-out is then determined to be the multiplication of the
five-bit multiplier value with the resolution. (For example: writing 00001110 in the Watchdog
Register = 3*1 or 3 seconds).
The accuracy of the timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M41ST85W sets the
WDF (Watchdog Flag) and generates a watchdog interrupt or a microprocessor reset.
The most significant bit of the Watchdog Register is the Watchdog Steering Bit (WDS).
When set to a '0,' the watchdog will activate the IRQ/FT/OUT pin when timed-out. When
WDS is set to a '1,' the watchdog will output a negative pulse on the RST pin for t
Watchdog register, FT, AFE, ABE and SQWE Bits will reset to a '0' at the end of a Watchdog
time-out when the WDS Bit is set to a '1.'
The watchdog timer can be reset by two methods: 1) a transition (high-to-low or low-to-high)
can be applied to the Watchdog Input pin (WDI) or 2) the microprocessor can perform a
WRITE of the Watchdog Register. The time-out period then starts over.
The WDI pin should be tied to V
In order to perform a software reset of the watchdog timer, the original time-out period can
be written into the Watchdog Register, effectively restarting the count-down cycle.
Should the watchdog timer time-out, and the WDS Bit is programmed to output an interrupt,
a value of 00h needs to be written to the Watchdog Register in order to clear the
HIGH-Z
SS
if not used.
trec
HIGH-Z
AI03920
rec
. The