pca8565 NXP Semiconductors, pca8565 Datasheet - Page 12
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pca8565
Manufacturer Part Number
pca8565
Description
Real Time Clock/calender
Manufacturer
NXP Semiconductors
Datasheet
1.PCA8565.pdf
(26 pages)
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Philips Semiconductors
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Product data
Fig 6. Bit transfer.
Fig 7. Definition of start and stop conditions.
Fig 8. System configuration.
SDA
SCL
TRANSMITTER /
SDA
SCL
RECEIVER
MASTER
9.2 Start and stop conditions
9.3 System configuration
9.4 Acknowledge
START condition
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH is defined as the start condition (S).
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the
stop condition (P), see
A device generating a message is a transmitter, a device receiving a message is the
receiver. The device that controls the message is the master and the devices which
are controlled by the master are the slaves (see
The number of data bytes transferred between the start and stop conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH-level signal put on the bus by the
transmitter during which time the master generates an extra acknowledge related
SDA
SCL
S
RECEIVER
SLAVE
Rev. 01 — 31 March 2003
data valid
data line
stable;
Figure
TRANSMITTER /
RECEIVER
SLAVE
allowed
change
of data
7.
TRANSMITTER
MASTER
STOP condition
Figure
MBC621
P
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8).
Real time clock/calender
MBC622
TRANSMITTER /
RECEIVER
MASTER
SDA
SCL
PCA8565
MBA605
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