pca8565 NXP Semiconductors, pca8565 Datasheet - Page 10
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pca8565
Manufacturer Part Number
pca8565
Description
Real Time Clock/calender
Manufacturer
NXP Semiconductors
Datasheet
1.PCA8565.pdf
(26 pages)
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Philips Semiconductors
Table 24:
Table 26:
9397 750 10695
Product data
Bit
7
1 to 0
Bit
7 to 0
Timer control (address 0EH) bits description
Timer (address 0FH) bits description
Symbol
TE
TD1 and
TD0
Symbol
timer
8.7 EXT_CLK test mode
Value
0
1
Value
00 to FF
For accurate read back of the countdown value, the I
operating at a frequency of at least twice the selected timer clock.
Table 25:
A test mode is available which allows for on-board testing. In such a mode it is
possible to set up test conditions and control the operation of the RTC.
The test mode is entered by setting bit TEST1 in control/status1 register. Then
pin CLKOUT becomes an input. The test mode replaces the internal 64 Hz signal
with the signal applied to pin CLKOUT. Every 64 positive edges applied to
pin CLKOUT will then generate an increment of one second.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and
a minimum period of 1000 ns. The internal 64 Hz clock, now sourced from CLKOUT,
is divided down to 1 Hz by a 2
set into a known state by using bit STOP. When bit STOP is set, the pre-scaler is
reset to 0 (STOP must be cleared before the pre-scaler can operate again).
From a STOP condition, the first 1 second increment will take place after 32 positive
edges on CLKOUT. Thereafter, every 64 positive edges will cause a 1 second
increment.
Remark: Entry into EXT_CLK test mode is not synchronized to the internal 64 Hz
clock. When entering the test mode, no assumption as to the state of the pre-scaler
can be made.
Operation example:
TD1
0
0
1
1
2. Set STOP (control/status 1, bit STOP = 1)
1. Set EXT_CLK test mode (control/status 1, bit TEST1 = 1)
Description
timer is disabled
timer is enabled
timer source clock frequency select; these bits determine the source clock for the
countdown timer, see
1
Description
countdown value = n; CountdownPeriod
16
TD1 and TD0: Timer frequency selection
Hz for power saving
TD0
0
1
0
1
Rev. 01 — 31 March 2003
Table
6
divide chain called a pre-scaler. The pre-scaler can be
25; when not in use, TD1 and TD0 should be set to
TIMER Source clock frequency
4096 Hz
64 Hz
1 Hz
1
60
Hz
=
-------------------------------------------------------------- -
SourceClockFrequency
2
C-bus clock (SCL) must be
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Real time clock/calender
n
PCA8565
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