pcf85103c-2 NXP Semiconductors, pcf85103c-2 Datasheet - Page 4

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pcf85103c-2

Manufacturer Part Number
pcf85103c-2
Description
Pcf85103c-2 256 X 8-bit Cmos Eeprom With I2c-bus Interface
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
6. Pinning information
7. Device addressing
9397 750 14218
Product data
6.1 Pinning
6.2 Pin description
Table 4:
Table 5:
[1]
A2, A1, A0 are hardware selectable pins.
A system could have up to eight PCF85103C-2 devices on the same I
equivalent to a 16 kbit EEPROM or 8 pages of 256 bytes of memory.
The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level ‘1’
when connected to V
various address combinations.
Symbol
A0
A1
A2
V
SDA
SCL
N.C.
V
Selection
Bit
Device
Fig 2. Pin configuration.
SS
DD
The Most Significant Bit (MSB) ‘b7’ is sent first.
Pin description
Device address code
b7
Pin
1
2
3
4
5
6
7
8
Rev. 04 — 22 October 2004
0
[1]
DD
, logic level ‘0’ when connected to GND).
Device code
b6
0
Description
address input 0
address input 1
address input 2
negative supply voltage
serial data input/output (I
serial clock input (I
no connect
positive supply voltage
V SS
A0
A1
A2
256
b5
1
2
3
4
1
8-bit CMOS EEPROM with I
002aaa251
b4
0
2
C-bus)
7
6
5
8
2
V DD
SDA
N.C.
SCL
C-bus)
A2
b3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
PCF85103C-2
Chip Enable
A1
b2
Figure 3
2
C-bus interface
2
A0
b1
C-bus,
shows the
R/W
R/W
b0
4 of 20

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