pcf8535 NXP Semiconductors, pcf8535 Datasheet - Page 21
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pcf8535
Manufacturer Part Number
pcf8535
Description
65 X 133 Pixel Matrix Driver
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8535.pdf
(56 pages)
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Philips Semiconductors
7.15.2
The output addressing of the RAM is done automatically in
accordance with the currently selected multiplex rate.
Normally the user would not need to make any alterations
to the addressing. There are, however, circumstances
pertaining to various connectivity of the device on a glass
that would benefit from some built-in functionality. Three
modes exist that enable the user to modify the output
addressing:
1. Mirror the Y axis (bit MY). This mode effectively flips
2001 Nov 07
handbook, full pagewidth
65
the display around the X axis, resulting in an upside
down display. The effect is observable immediately the
bit is modified. This is useful if the device is to be
mounted above the display area instead of below.
O
133 pixel matrix driver
UTPUT ADDRESSING
Mirror
MY = 0
MY = 1
Y axis
Y axis
Fig.14 Mirror Y behaviour (Mux rate 1 : 65).
R64
R55
R56
R57
R58
R59
R60
R61
R62
R63
R64
R0
R1
R2
R3
R4
R5
R6
R7
R8
... icons ...
... icons ...
21
2. Bottom Row Swap (BRS). This mode swaps the order
3. Top Row Swap (TRS). As with BRS, but swaps the
7.15.2.1
As described above, the Y axis is mirrored in the X axis.
(1)
of the rows on the bottom
useful to aid routing to the display when it is not
possible to pass tracks under the device; a typical
example would be in tape carrier package. This mode
is often used in conjunction with TRS.
order of rows on the top
The top edge is defined as the edge containing the user
interface pads. The bottom edge is the opposing edge.
Mirror Y
MGS679
(1)
(1)
..
edge of the chip.
edge of the chip. This is
Product specification
PCF8535
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