nbc12430 ON Semiconductor, nbc12430 Datasheet - Page 14

• Manufacturer Part Number: nbc12430
• Description: 3.3v/5vprogrammable Pll Synthesized Clock Generator
• Manufacturer: ON Semiconductor

are confused with one another. The typical method of
measuring jitter is to look at the timing signal with an
oscilloscope and observe the variations in period-to-period
or cycle-to-cycle. If the scope is set up to trigger on every
rising or falling edge, set to infinite persistence mode and
allowed to trace sufficient cycles, it is possible to determine
the maximum and minimum periods of the timing signal.
Digital scopes can accumulate a large number of cycles,
create a histogram of the edge placements and record
peak-to-peak as well as standard deviations of the jitter.
Care must be taken that the measured edge is the edge
immediately following the trigger edge. These scopes can
also store a finite number of period durations and
post-processing software can analyze the data to find the
maximum and minimum periods.
resulted in advanced jitter measurement techniques. The
Tektronix TDS-series oscilloscopes have superb jitter
analysis capabilities on non-contiguous clocks with their
histogram and statistics capabilities. The Tektronix
TDSJIT2/3 Jitter Analysis software provides many key
timing parameter measurements and will extend that
capability by making jitter measurements on contiguous
clock and data cycles from single-shot acquisitions.
correlated.
and is more accurate. All of the jitter data reported on the
NBC12430 and NBC12430A was collected in this manner.
There are different ways to measure jitter and often they
Recent hardware and software developments have
M1 by Amherst was used as well and both test methods
This test process can be correlated to earlier test methods
25
20
15
10
5
0
400
N = 1
Figure 12. RMS Jitter vs. VCO Frequency
N = 8
N = 2
N = 4
500
VCO FREQUENCY (MHz)
600
700
NBC12430, NBC12430A
http://onsemi.com
800
14
Figure 13 shows the jitter as a function of the output
frequency. The graph shows that for output frequencies from
50 to 800 MHz the jitter falls within the "20 ps
peak-to-peak specification. The general trend is that as the
output frequency is increased, the output edge jitter will
decrease.
NBC12430 and NBC12430A across its specified VCO
frequency range. Note that the jitter is a function of both the
output frequency as well as the VCO frequency. However,
the VCO frequency shows a much stronger dependence. The
data presented has not been compensated for trigger jitter.
observed at the end of a period's edge when compared to the
position of the perfect reference clock's edge and is specified
by the number of cycles over which the jitter is measured.
The number of cycles used to look for the maximum jitter
varies by application but the JEDEC spec is 10,000 observed
cycles.
cycle-to-cycle jitter, which rivals that of SAW based
oscillators. This jitter performance comes with the added
flexibility associated with a synthesizer over a fixed
frequency oscillator. The jitter data presented should
provide users with enough information to determine the
effect on their overall timing budget. The jitter performance
meets the needs of most system designs while adding the
flexibility of frequency margining and field upgrades. These
features are not available with a fixed frequency SAW
oscillator.
Figure 12 illustrates the RMS jitter performance of the
Long-Term Period Jitter is the maximum jitter
The NBC12430 and NBC12430A exhibit long term and
25
20
15
10
5
0
Figure 13. RMS Jitter vs. Output Frequency
100
200
OUTPUT FREQUENCY (MHz)
300
400
500
600
700
800