el4585 Intersil Corporation, el4585 Datasheet - Page 10

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el4585

Manufacturer Part Number
el4585
Description
Horizontal Genlock, 8fsc
Manufacturer
Intersil Corporation
Datasheet

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maximum modulation capability. The frequency of oscillation
is given by:
F
C
Choosing Loop Filter Components
The PLL, VCO, and loop filter can be described as:
Where:
It can be shown that for the loop filter shown below:
C
Where ω
factor.
N
1. K
2. The loop bandwidth should be about H
3. N = 910x2 = 1820 from Table 1.
4. K
T
3
=
K
F(s) = loop filter impedance in V/A
K
N = Total internal or external divisor (see 3 below)
=
=
=
d
VCO
frequency/20, and the damping ratio should be 1 for
optimum performance. For our example,
ω
for each volt applied at the control pin. It is assumed (but
probably is not) linear about the lock point (2.5V). Its
value depends on the VCO configuration and the varactor
transfer function C
bias control voltage, and C
Since F(V
VCO and measure K
such measurement are shown below. The slope of the
curve is determined by linear regression techniques and
equals K
---------------------- -
2π LC
------------------- -
F
F
= phase detector gain in A/rad
d
n
VCO
------------------------------------------------------------------------- -
(
K
----------------------- - C
Hsync
C
VCO
d
= 300µA/2πrad = 4.77e-5A/rad for the EL4585.
= 15.734kHz/20=787 Hz≈5000 rad/S.
1
1
K
n
= VCO gain in rad/s/V
C
VCO
represents how much the VCO frequency changes
= loop filter bandwidth, and ζ = loop filter damping
2
2
n
T
)
=
VCO
+
,
C
C
--------------------------- -
15.73426k
(
) is nonlinear, it is probably best to build the
28.636M
C
1
4
C
1
. For our example, K
C
=
2
C
V
C
------ - R
10
)
v
3
+
V
,
(
= F(V
C
VCO
=
3
1
C
1820
=
10
V
----------------------- -
K
about 2.5V. The results of one
C
)
2Nζω
V
d
), where V
K
is varactor capacitance.
=
VCO
910x2
n
VCO
C
SYNC
= 9.06 Mrad/s/V.
is the reverse
EL4585
C
C
R
Lock Time
Let T = R
does lock time. Decreasing T decreases damping and
speeds up loop response, but increases overshoot and thus
increases the number of hunting oscillations before lock.
Critical damping (ζ=1) occurs at minimum lock time.
Because decreased damping also decreases loop stability, it
is sometimes desirable to design slightly overdamped (ζ>1),
trading lock time for increased stability.
5. Now we can solve for C
6. Notice R
3
4
3
=
=
=
We choose R
should be large, around 100K, and can be adjusted to
compensate for any static phase error Tθ at lock, but if
made too large, will slow loop response. If R
smaller, Tθ (see timing diagrams) increases, and if R
increases, Tθ decreases. For LDET to be low at lock, |Tθ|
< 50ns. C
noise from the charge pump. The effect these
components have on time to lock is illustrated below.
K
----------------------- -
C
------ -
----------------------- -
K
10
2Nζω
d
d
3
K
K
=
3
VCO
VCO
C
2
n
0.001µF
2
3
2
. As T increases, damping increases, but so
4
has little effect on the loop filter design. R
=
=
is used mainly to attenuate high frequency
(
----------------------------------------------------- -
2 ( ) 1820
----------------------------------------------------- -
(
3
4.77e 5
4.77e 5
TYPICAL LOOP FILTER
= 43kΩ for convenience.
(
FOSC vs VC, LC VCO
(
1820
) 5000
) 1 ( ) 5000
(
) 9.06e6
) 9.06e6
(
(
3
, C
(
)
4
2
, and R
)
)
)
=
=
0.01µF
42.1kΩ
3
:
2
is made
July 1, 2005
FN7175.3
2
2

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