pck953 NXP Semiconductors, pck953 Datasheet - Page 3

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pck953

Manufacturer Part Number
pck953
Description
50-125 Mhz Pecl Input/9 Cmos Output 3.3 V Pll Clock Driver
Manufacturer
NXP Semiconductors
Datasheet

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ORDERING INFORMATION
LOGIC DIAGRAM
FUNCTION TABLE
ABSOLUTE MAXIMUM RATINGS
NOTE:
1. Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
2003 Jul 31
SYMBOL
20-125 MHz PECL input / 9 CMOS output
3.3 V PLL clock driver
LQFP32 plastic low profile quad
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is
not implied.
V
T
I
V
CC
IN
stg
I
flat package; 32 leads
PECL_CLK
PECL_CLK
VCO_SEL
VCO_SEL
PACKAGES
BYPASS
PLL_EN
BYPASS
MR/OE
FB_CLK
PLL_EN
MR/OE
Supply voltage
Input voltage
Input current
Storage temperature range
1
0
1
0
1
0
1
0
Function
Function
Function
Function
PLL Enabled
PLL Bypass
Outputs Disabled
Outputs Enabled
B2
B1
Select VCO
Select PECL_CLK
DETECTOR
TEMPERATURE RANGE
1
PHASE
0 to +70 °C
PARAMETER
LPF
200-500 MHz
VCO
3
ORDER CODE
PCK953BD
÷
2
÷
4
MIN
-0.3
-0.3
-40
DRAWING NUMBER
SOT358-1
V
DD
MAX
+125
±20
4.6
SW00624
7
PCK953
+0.3
QFB
Q0:6
Q7
Product data
UNIT
mA
°C
V
V

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