cy7b9973v Cypress Semiconductor Corporation., cy7b9973v Datasheet
cy7b9973v
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cy7b9973v Summary of contents
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... The thirteen configurable outputs can each drive terminated transmission lines with impedances as low as 50Ω while deliv- ering minimal and specified output skews at LVTTL levels. The CY7B9973V has a flexible reference input scheme with three different hot-insertion capable inputs. These inputs allow the use of either differential LVPECL or single-ended LVTTL inputs which can be dynamically selected to provide the reference frequency ...
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... VCO/2 ÷ 6 Ref_Sel Controlled by TCLK_Sel ÷ 8 TCLK_Sel TCLK0 ÷ 10 PLL_En Bypass PLL ÷ 8 MR/OE Master Reset/Output Hi-Z Enable Outputs ÷ 12 Inv_Clk Noninverted Qc2, Qc3 ÷ 16 ÷ 20 ® RoboClock CY7B9973V 27 26 fselFB1 25 LOCK 24 GNDO 23 Qc0 22 VCCO 21 Qc1 20 fselc0 19 fselc1 18 Qc2 17 VCCO 16 Qc3 15 GNDO 14 Inv_Clk ...
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... It is always active and does not high impedance state. This output provides TEST MODE information when PLL_En is LOW. Note: 1. Includes internal PULL-UP. If this pin is left unconnected it will assume a HIGH level. Document #: 38-07430 Rev. *B RoboClock CY7B9973V Description Page ® [+] Feedback ...
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... LOW), the device will reenter PLL bypass mode. Safe Operating Zone The device will operate below its maximum allowable junction temperature (t < 150°C) in any configuration of multiply or J divide with all outputs loaded to the data sheet maximum (i.e., with 25-pF load and 0-m/s air flow). ® RoboClock CY7B9973V Page [+] Feedback ...
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... CMR 3. The CY7B9973V clock outputs can drive series or parallel terminated 50Ω (or 50Ω to VCC/2) transmission lines on the incident edge. 4. Inputs have pull-up resistors which affect input current. 5. Tested initially and after any design or process changes that may affect these parameters. ...
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... L (a) LVTTL AC Test Load 2.0V 2.0V 10% 0.8V 1.0V < < (c) LVPECL Input Test Waveform does not include jitter. PD for GND for t ). For t and t CC OZL OZH OZL OZH RoboClock CY7B9973V Min. Typ. Max. Unit 0.15 – 1.2 ns. 0.15 – 1.2 ns CYCLE CYCLE CYCLE – ...
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... Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges refdc refdc jitter Package Type A52 52-Lead Thin Quad Flat Pack ® RoboClock CY7B9973V Operating Range Commercial 51-85131-** Page [+] Feedback ...
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... Document History Page Document Title: CY7B9973V RoboClock Document Number: 38-07430 REV. ECN No. Issue Date ** 115842 06/10/02 *A 128182 09/15/03 *B 506217 See ECN Document #: 38-07430 Rev. *B ® High-Speed Multi-Output PLL Clock Buffer Orig. of Change Description of Change HWT New Data Sheet Added phase and period jitter specifications ...