w83195bg-912 Winbond Electronics Corp America, w83195bg-912 Datasheet - Page 19

• Manufacturer Part Number: w83195bg-912
• Description: Clock For Via Chipsets
• Manufacturer: Winbond Electronics Corp America

7.14 Register 13: Control (Default: 24h)
7.15 Register 14: Control (Default: 5Xh)
7.16 Register 15: Slew Rate Control (Default: 55h)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
7
6
5
4
3
2
1
0
CSKEW [2]
CSKEW [1]
CSKEW [0]
PSKEW [2]
PSKEW [1]
PSKEW [0]
PCI_F_S2
PCI_F_S1
CPUCS_S2
CPUCS_S1
INV_AGP
USB48_S2
USB48_S1
SELP4_K7
INV_PCI
INV_DDR
AGP_S2
AGP_S1
NAME
NAME
NAME
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
PWD
PWD
0
0
1
0
0
1
0
0
1
0
X
X
0
1
0
1
0
1
Invert the AGP phase 0: Default, 1: Inverse
Invert the PCI phase 0: Default, 1: Inverse
CPU to CPUCS skew control, Skew resolution is 340ps
Expand the skew direction is same as
CPU_CPUCS_SKEW [2:0] setting
CPU to PCI skew control, Skew resolution is 340ps
Expand the skew direction is same as
CPU_PCI_SKEW [2:0] setting
PCI_F slew rate control
11: Strong, 00: Weak, 10/01: Normal
CPUCS_T/C slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
USB48/DOT48/USB24_48 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
AGP2,1,0 slew rate control
11 : Strong , 00 : Weak , 10/01 : Normal
Device active mode selection
1: P4 mode
0: K7 mode
Default
SELP4_K7/AGP1 (Default 1)
Inverse feature
1: inverse DDROUT/FBOUT clock
0: Normal
(Default 0)
value
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FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
hardware
Publication Release Date: Mar. 2006
trapping
W83195BG-912
data
Revision 0.6
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pin7