w83195bg-912 Winbond Electronics Corp America, w83195bg-912 Datasheet - Page 13

• Manufacturer Part Number: w83195bg-912
• Description: Clock For Via Chipsets
• Manufacturer: Winbond Electronics Corp America

7. I
(The register No. is increased by 1 if use byte data read/write protocol)
7.1
7.2
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
2
Register 0: Frequency Select (Default =08h)
Register 1: SRC/CPU Clock (1 = Enable, 0 = Disable) (Default: A9h)
C CONTROL AND STATUS REGISTERS
EN_SAFE_FRE
EN_SSEL
CPUCS_C
CPUCS_T
SPSPEN
SSEL [4]
SSEL [3]
SSEL [2]
SSEL [1]
SSEL [0]
L_MODE
CPUT/C
NAME
NAME
FS4
FS3
FS2
FS1
FS0
Q
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
PWD
0
0
0
0
1
0
0
0
X
X
X
X
1
0
1
0
Software frequency table selection through I
Enable software table selection FS [4:0].
0 = Hardware table setting (Jump mode).
1 = Software table setting through Bit7~3. (Jump less mode)
Enable spread spectrum mode under clock output.
0 = Spread Spectrum mode disable
1 = Spread Spectrum mode enable
Enable reload safe frequency when the watchdog is timeout.
0 = reload the FS [3:0] latched pins when watchdog time out.
1 = reload the safe frequency bit defined at Register 5 bit 4~0.
Pin 48,49 CPUCS_T/C output control
Selection for Pin 26. Power Down Input / System Reset Control
Output
1: System Reset feature
0: Power Down feature (Default)
Pin 53,52 CPUT/C output control
Mapping software table.
Power on latched value of FS3 (20) pin.
Power on latched value of FS2 (21) pin.
Power on latched value of FS1 (10) pin.
Power on latched value of FS (1) pin.
- 9 -
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
Publication Release Date: Mar. 2006
Default 1 (Read only)
Default 1 (Read only)
Default 0 (Read only)
Default 0 (Read only)
W83195BG-912
2
C
Revision 0.6