w83195bg-912 Winbond Electronics Corp America, w83195bg-912 Datasheet - Page 18

• Manufacturer Part Number: w83195bg-912
• Description: Clock For Via Chipsets
• Manufacturer: Winbond Electronics Corp America

7.12 Register 11: Control (Default: X7h)
7.13 Register 12: Control (Default: 3Ch)
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
CPUT_DRI
SPCNT [5]
SPCNT [4]
SPCNT [3]
SPCNT [2]
SPCNT [1]
SPCNT [0]
MULTSEL
SPSP_TYPE
NAME
ASKEW [2]
ASKEW [1]
ASKEW [0]
INV_CPU
TRI_EN
SPSP1
SPSP0
NAME
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
X
1
1
0
0
1
1
1
PWD
CPUT output state in during POWER DOWN or Stop mode assertion.
0: Driven
CPUC always tri-state (floating) in power down Assertion.
On P4 mode CPU clock output level selection
Refer to Page 5 Table-1
Default value follow hardware trapping data on pin12 MULTSEL/PCI2
(Default 1)
Spread Spectrum Programmable time, the resolution is 280ns.
Default period is 11.8us
0
0
1
1
1
1
0
0
Invert the CPU phase
0: Default, 1: Inverse
Tri-state all output if set 1
Spread spectrum implementation method
1 : Pendulum type
0 : Original
Spread Spectrum type select.
CPU to AGP skew control, Skew resolution is 340ps
Expand the skew direction is same as
CPU_AGP_SKEW [2:0] setting
00: Down 1%
01: Down 0.5%
10: Center ± 0.5%
11: Center ± 0.25%
(2*Iref), 1: Tristate (Floating)
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FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
W83195BG-912