w83194r-81 Winbond Electronics Corp America, w83194r-81 Datasheet - Page 4

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w83194r-81

Manufacturer Part Number
w83194r-81
Description
100mhz Clock Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet

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5.2 CPU, SDRAM, PCI Clock Outputs, continued
PCICLK 0 / *FS2
PCICLK [ 1:4 ]
5.3 I
*SDATA
*SDCLK
5.4 Fixed Frequency Outputs
IOAPIC
REF0 / *MODE
REF1 /*SD_SEL#
REF2 / CPU3.3#_2.5
SIO / *SEL24_14#
48MHz / *FS0
2
C Control Interface
SYMBOL
SYMBOL
SYMBOL
10,11,12,13
PIN
PIN
PIN
23
24
47
46
44
25
26
8
2
OUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
O
- 4 -
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
PCI clock during normal operation.
Low skew (< 250ps) PCI clock outputs.
Serial data of I
Serial clock of I
2.5V fixed 14.318MHz
3.3V, 14.318MHz reference clock output.
Internal 250k
Function select pin.
3.3V, 14.318MHz reference clock output
Internal 250k
Latched input at Power On selects the frequencies
for clock outputs.
Internal 250k
Latched input for CPU3.3#_2.5 at initial power up.
Reference clock during normal operation.
Latched high - Vddq2b = 2.5V
Latched low - Vddq2b = 3.3V
*SEL24_14# controls the frequency of SIO. If logic 0
at power on, SIO=14.318. If logic 1, SIO=24MHz for
super I/O.
Internal 250k
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks. 48MHz output for USB during normal
operation.
2
pull-up.
pull-up.
pull-up.
pull-up.
C 2-wire control interface
2
C 2-wire control interface
Publication Release Date: Dec. 1998
FUNCTION
FUNCTION
FUNCTION
W83194R-81
PRELIMINARY
Revision 0.20

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