w83194r-81 Winbond Electronics Corp America, w83194r-81 Datasheet - Page 3

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w83194r-81

Manufacturer Part Number
w83194r-81
Description
100mhz Clock Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet

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5.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250k
5.1 Crystal I/O
Xin
Xout
5.2 CPU, SDRAM, PCI Clock Outputs
CPUCLK [ 0:2 ]
SDRAM11/
*CPU_STOP#
SDRAM10/
*PCI_STOP#
SDRAM9/
*SDRAM_STOP#
SDRAM8/ *PD#
SDRAM[0:7],
SDRAM12
PCICLK_F/ *FS1
SYMBOL
SYMBOL
pull-up
28,29,31,32,34
, 35,37,38,15
40,41,43
PIN
PIN
17
18
20
21
4
5
7
OUT
OUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
O
- 3 -
Crystal input with internal loading capacitors and
feedback resistors.
Crystal output at 14.318MHz nominally.
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
Vddq2b is the supply voltage for these outputs.
If MODE =1 (default), then this pin is a SDRAM clock
buffered output of the crystal. If MODE = 0 , then this
pin is CPU_STOP# input used in power
management mode for synchronously stopping the
all CPU clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is
PCI_STOP # and used in power management mode
for synchronously stopping the all PCI clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is
SDRAM_STOP # and used in power management
mode for stopping the all SDRAM clocks.
If MODE = 1 (default), then this pin is a SDRAM
clock output. If MODE = 0 , then this pin is PD # and
used to power down the device into a power down
state.
SDRAM clock outputs which have the same
frequency as CPU clocks.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Free running PCI clock during normal operation.
Publication Release Date: Dec. 1998
FUNCTION
FUNCTION
W83194R-81
PRELIMINARY
Revision 0.20

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