w83194br-603 Winbond Electronics Corp America, w83194br-603 Datasheet - Page 16

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w83194br-603

Manufacturer Part Number
w83194br-603
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.13 Register 12: Divisor and Step-less Enable Control Register: (Default: FBh)
Table-2 CPU, 3V66 divider ratio selection Table
7.14 Register 13: Divisor and Step-less Enable Control Register (Default: 0Fh)
BIT
7 EN_MN_PROG
6 Reserved
5 Reserved
4 Reserved
3 IVAL<3>
2 IVAL<2>
1 IVAL<1>
0 IVAL<0>
BIT
7
6
5
4
3
2
1
0
Bit2/
Bit9
MSB
Reserved
DS9
DS5
Reserved
Reserved
DS2
DS1
DS0
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
NAME
NAME
0
1
LSB
PWD
1
1
1
1
1
0
1
1
Div10
Div6
Reserved
Define the 3V66 divider ratio
Table-2 integrate the all divider configuration
Reserved
Define the CPU divider ratio
Refer to Table-2
PWD
0
0
0
0
0
1
1
1
1
3V66
Bit5
0: Output frequency depend on frequency table
1: Program all clock frequency by changing M/N value
The equation is
Once the watchdog timer timeout, the bit will be clear. Then the
frequency will be decided by hardware default FS<4:0> or desired
frequency select SAF_FREQ [4:0] depend on EN_SAFE_FREQ
(Reg0 - bit 0).
Reserved
Reserved
Reserved
Charge pump current selection
VCO =14.318MHz*(N+4)/ M.
Div12
Div7
1
W83194BR-603/W83194BG-603
- 12 -
Div2
Div8
00
DESCRIPTION
DESCRIPTION
Div3
Div8
01
Bit1, 0
CPU
Div4
Div8
10
Div6
Div8
11

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