w83194br-603 Winbond Electronics Corp America, w83194br-603 Datasheet - Page 11

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w83194br-603

Manufacturer Part Number
w83194br-603
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.
7.1
7.2
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
I2C CONTROL AND STATUS REGISTERS
Register 0: Frequency Select Register (Default = 10h)
Register 1: CPU Clock Register (1 = Enable, 0 = Stopped) (Default: E2h)
SSEL [4]
SSEL [3]
SSEL [2]
SSEL [1]
SSEL [0]
EN_SSEL
EN_SPSP
EN_SAFE_FREQ
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
PIN NO
45,44
42,41
39,38
NAME
-
-
-
-
-
PWD
X
X
X
X
X
1
1
1
PWD
0
0
0
1
0
0
0
0
CPUT/C_ITP output control.
CPUT1 / C1 output control.
CPUT0 / C0 output control.
Power on latched value of FS4 pin. Default: 0,
Power on latched value of FS3 pin. Default: 0.
Power on latched value of FS2 pin. Default: 0.
Power on latched value of FS1 pin. Default: 1.
Power on latched value of FS0 pin. Default: 0.
Frequency selection by software via I
Enable software program FS [4:0].
0 = Select frequency by hardware.
1= Select frequency by software I
Enable Spread Spectrum in the frequency table.
0 = Normal
1 = Spread Spectrum enabled
Enable reload safe frequency when the watchdog is timeout.
0 = reload the FS [4:0] latched pins when watchdog time out.
1 = reload the safe frequency bit defined at Register 5 bit 4~0.
W83194BR-603/W83194BG-603
- 7 -
DESCRIPTION
DESCRIPTION
2
Publication Release Date: March, 2006
C - Bit 7~ 3.
2
C
(Read Only).
(Read Only).
(Read Only).
(Read Only).
(Read Only).
Revision 0.7

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