w83194br-655 Winbond Electronics Corp America, w83194br-655 Datasheet - Page 19

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w83194br-655

Manufacturer Part Number
w83194br-655
Description
Clock For Sis Chipsets Winbond Clock Generator
Manufacturer
Winbond Electronics Corp America
Datasheet
7.17 Register 16: Skew Control (Default: 24h)
7.18 Register 17: Slew rate Control (Default: 00h)
7.19 Register 18: Slew rate Control (Default: 00h)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
INV_AGP
INV_PCI
ZSKEW<2>
ZSKEW<1>
ZSKEW<0>
PSKEW<2>
PSKEW<1>
PSKEW<0>
INV_SRC
INV_USB12
PCI_F0_S2
PCI_F0_S1
Reserved
Reserved
AGP_10_S2
AGP_10_S1
PCI_5_S2
PCI_5_S1
PCI_42_S2
PCI_42_S1
PCI_10_S2
PCI_10_S1
REF_S2
REF_S1
NAME
NAME
NAME
PWD
PWD
PWD
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Invert the AGP phase, 0: Default, 1: Inverse
Invert the PCI phase, 0: Default, 1: Inverse
CPU1 to ZCLK skew control
Skew resolution is 250ps
The decision of skew direction is same as ZSKEW<2:0> setting
CPU1 to PCI skew control
Skew resolution is 250ps
The decision of skew direction is same as PSKEW<2:0> setting
Invert the SRC phase, 0: Default, 1: Inverse.
Invert the USB12_48 phase, 0: In phase with USB24_48
1: 180 degrees out of phase
PCI_F1 / PCI_F0 slew rate control
11: Strong, 00: Weak, 10/01: Normal
Reserved
AGP_1 / AGP_0 slew rate control
11: Strong, 00: Weak, 10/01: Normal
PCI5 slew rate control
11: Strong, 00: Weak, 10/01: Normal
PCI4, 3,2 slew rate control
11: Strong, 00: Weak, 10/01: Normal
PCI1, 0 slew rate control
11: Strong, 00: Weak, 10/01: Normal
REF0, 1 slew rate control
11: Strong, 00: Weak, 10/01: Normal
W83194BR-655/W83194BG-655
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: February 14, 2006
Revision 1.0

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