vsc8163 Vitesse Semiconductor Corp, vsc8163 Datasheet
vsc8163
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vsc8163 Summary of contents
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... Differential LVPECL Low-Speed Interface General Description The VSC8163 is a 16:1 multiplexer with integrated clock generator for use in SONET/SDH systems oper- ating at a 2.48832Gb/s data rate. The internal clock generator uses a Phase-Locked Loop (PLL) to multiply either a 77.76MHz or 155.52MHz reference clock in order to provide the 2.48832GHz clock for internal logic and output retiming ...
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... The Upstream Device should use the CLK16O as the timing source for its final output latch (see Figure 1). The Upstream Device should then generate a CLK16I phase aligned with the data. The VSC8163 will latch D[15:0] ± on the rising edge of CLK16I+. The data must meet setup and hold times with respect to CLK16I (see Table 2) ...
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... Holding RESET constantly “low” bypasses the FIFO for transparent mode operation. Figure 3: Split-End DC Termination of CLK16O+/-, REFCLKO+/- VSC8163 Figure 4: Traditional DC Termination of CLK16O+/-, REFCLKO+/- VSC8163 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 G52216-0, Rev 3.3 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com ...
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... Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION (see Table 3, Package Pin Descriptions, pins 5,6,7). CC Figure 6: High-Speed Output Termination Internet: www.vitesse.com Preliminary Data Sheet VSC8163 downstream 100nF bias point generated internally 100nF V -2V CC 100 G52216-0, Rev 3.3 01/05/00 ...
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... PLL and appear as jitter on the output. Preconditioning of the REFCLK signal with a VCXO may be required to avoid passing REFCLK noise with greater than 2ps of RMS jitter to the output. The VSC8163 will output the REFCLK noise in addition to the intrinsic jitter from the VSC8163 itself during such conditions. ...
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... Extra care needs to be taken when decoupling the analog power supply pins (V the optimal jitter and loop bandwidth characteristics of the PLL contained in the VSC8163, the analog power supply pins should be filtered from the main power supply with C-L-C pi filter. If preferred, a ferrite bead may be used to provide the isolation ...
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... Preliminary Data Sheet VSC8163 AC Characteristics Figure 9: Parallel Input Data and Clock Timing Waveforms CLK16I+ Parallel Data Clock Input D[0...15]+ Parallel Data Inputs CLK16O+ Parallel Data Clock Output Figure 10: Serial Data and Clock Output Phase Timing Waveforms DO+ Differential Serial Data Output CLKO+ Differential Clock Output © ...
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... Internet: www.vitesse.com Preliminary Data Sheet VSC8163 Units Conditions ns ns 20% to 80% into 100 load ps See Figure 6 ps See Figures 3 and Assuming 10% distortion of CLKO % % SONET based 77.76MHz or ps 155.52MHz reference clock SONET based 77 ...
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... Preliminary Data Sheet VSC8163 Figure 11: Differential and Single-Ended Input / Output Voltage Measurement Differential swing ) is specified the single ended swing. Differential swing is specified as equal in magnitude to single ended swing. Table 2: DC Characteristics Parameters Description V Output HIGH voltage (DO) ...
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... Parametric Test Load Circuit 80% 20 Parametric Test Load Circuit High-Speed Data Output Internet: www.vitesse.com Preliminary Data Sheet VSC8163 Max Units Conditions 0.8 V 500 µ 2.4V IN -500 µ 0.4V IN 3.47 V 3.3V± 5% Outputs open, 1 ...
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... Functionality at or above the values listed is not implied. Exposure to these values for extended periods may affect device reliability. ESD Ratings Proper ESD procedures should be used when handling this product. The VSC8163 is rated to the following ESD voltages based on the human body model: 1. All pins are rated at or above 1500V. ...
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... VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Figure 13: Pin Diagram—128-Pin PQFP VSC8163 Internet: www.vitesse.com Preliminary Data Sheet VSC8163 102 VCC 101 D13+ 100 D13– 99 ...
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... Preliminary Data Sheet VSC8163 Package Pin Descriptions Table 3: Package Pin Identification Pin # Name VCC 5 VEEP_CLK 6 VEEP_CLK 7 VEEP_CLK 8 VCC 9 CLKO+ 10 CLKO- 11 VCC 12 VCC VEE 16 VEE 17 VEE 18 VCC 19 DO+ 20 DO- 21 VCC VCC 24 VCC 25 VCC 26 VEE 27 VEE 28 VEE ...
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... LVPECL Low-speed differential parallel data (MSB) — +3.3V typ. Positive power supply I LVPECL Low-speed differential parallel data I LVPECL Low-speed differential parallel data — — No connect, leave unconnected Internet: www.vitesse.com Preliminary Data Sheet VSC8163 Description (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) G52216-0, Rev 3.3 01/05/00 ...
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... Preliminary Data Sheet VSC8163 Pin # Name 64 VCC VCC 67 D2- 68 D2+ 69 VEE 70 D3- 71 D3+ 72 VCC 73 D4- 74 D4+ 75 VCC 76 D5- 77 D5+ 78 VEE 79 D6- 80 D6+ 81 VCC 82 D7- 83 D7+ 84 VCC 85 D8- 86 D8+ 87 VEE 88 D9- 89 D9+ 90 VCC 91 D10- 92 D10+ 93 VCC 94 D11- 95 D11+ 96 VEE 97 D12- © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 G52216-0, Rev 3.3 Tel: (800) VITESSE • ...
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... No connect, leave unconnected — — No connect, leave unconnected — GND typ. Negative power supply — GND typ. Negative power supply — +3.3V typ. Positive power supply Internet: www.vitesse.com Preliminary Data Sheet VSC8163 Description (1) (1) (1) (1) (1) (1) (1) (1) device. G52216-0, Rev 3.3 01/05/00 ...
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... Preliminary Data Sheet VSC8163 Package Information PIN 128 PIN 1 EXPOSED INTRUSION 0.127 MAX. EXPOSED HEATSINK PIN 38 10 TYP TYP. Notes: 1) Drawing is not to scale 2) All dimensions Package represented is also used for the 64, 80, & 100 PQFP packages. Pin count drawn does not reflect the 128 Package. © ...
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... Theta case-to-ambient at appropriate airflow CA Ambient Air temperature A(MAX) Case temperature (85 C(MAX) P Power (1.7W for VSC8163) (MAX) Page 18 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Description Thermal resistance from junction-to-case ...
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... Ordering Information The order number for this product is formed by a combination of the device number, and package type. Device Type VSC8163: OC-48 16:1 SONET/SDH MUX with Clock Generator Notice Vitesse Semiconductor Corporation (“Vitesse”) provides this document for informational purposes only. This document contains pre-production information about Vitesse products in their concept, development and/or testing phase ...
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... OC-48 16:1 SONET/SDH MUX with Clock Generator Page 20 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Internet: www.vitesse.com Preliminary Data Sheet VSC8163 G52216-0, Rev 3.3 01/05/00 ...