sy89202u Micrel Semiconductor, sy89202u Datasheet - Page 9

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sy89202u

Manufacturer Part Number
sy89202u
Description
Sy89202u Precision 1 8 Lvpecl Fanout Buffer With Three ?1/ ?2/ ?4 Clock Divider Output Banks
Manufacturer
Micrel Semiconductor
Datasheet

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Part Number
Manufacturer
Quantity
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Manufacturer:
MICREL
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Manufacturer:
MICREL
Quantity:
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June 2006
External ÷1 Output
External ÷2 Output
External ÷4 Output
Outputs go HIGH simultaneously after EN is asserted. The number of IN
clock cycles after EN is asserted before the outputs go HIGH varies from 2
to 6 cycles (4 cycles shown).
÷2 Output
÷1 Output
÷4 Output
IN, /IN
IN, /IN
EN
EN
V
CC
V
/2
Enable de-asserted to disable Q0 – Q7 Outputs
CC
/2
1
1
Timing Diagram Showing Disable Timing
Timing Diagram Showing Enable Timing
Enable asserted
2
2
Outputs go low in sequence after EN is de-asserted. The ÷4, ÷2 , ÷1
outputs go LOW in that order. The number of IN clock cycles after
EN is de-asserted varies from 2 to 6 cycles (4 cycles shown).
9
3
3
4
4
hbwhelp@micrel.com
M9999-061206-B
or (408) 955-1690

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