sy89202u Micrel Semiconductor, sy89202u Datasheet
sy89202u
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sy89202u Summary of contents
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... MR (master reset) is asserted. This is accomplished by enabling the outputs after a four-clock delay to allow the counters to synchronize. The SY89202U is part of Micrel’s Precision Edge product family. All support documentation can be found at Micrel’s web site at: www.micrel.com Precision Edge is a registered trademark of Micrel, Inc ...
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Functional Block Diagram June 2006 2 hbwhelp@micrel.com M9999-061206-B or (408) 955-1690 ...
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... Contact factory for die availability. Dice are guaranteed Tape and Reel. Pin Configuration June 2006 Operating Package Marking Range Industrial SY89202U with Pb-Free bar-line indicator Industrial SY89202U with Pb-Free bar-line indicator = 25°C, DC Electricals Only. A ® 32-Pin MLF (MLF-32) 3 Lead Finish NiPdAu ...
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Pin Description Pin Number Pin Name DIVSEL1 DIVSEL2 DIVSEL3 3, 6 IN, / VREF- 10, 19, 22, 31 VCC 16, 15, 14, Q4, /Q4, Q5, /Q5, 13, 12, 11 Q6, /Q6 30, ...
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Absolute Maximum Ratings Supply Voltage (V ) .............................-0.5V to +4.0V CC Input Voltage (V ) .....................................-0. Termination Current Source or sink current Output Current Source or sink current on IN, /IN................ ±50mA V Current ...
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LVPECL Outputs DC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter V Output HIGH Voltage Output LOW Voltage Output Voltage Swing OUT Differential Output ...
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AC Electrical Characteristics V = 2.5V ±5% or 3.3V ±10 Symbol Parameter Maximum Output Toggle Frequency f MAX Maximum Input Frequency Differential Propagation Delay t pd /MR – Q Propagation Delay t Differential Propagation Delay pd Tempco Temperature ...
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Single-Ended and Differential Swings Figure 1a. Single-Ended Voltage Swing Timing Diagrams IN, /IN / /MR asynchronously resets the outputs ÷1 Output ÷2 Output ÷4 Output Outputs go HIGH simultaneously after 4 complete input clock ...
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IN, / External ÷1 Output External ÷2 Output External ÷4 Output Outputs go HIGH simultaneously after EN is asserted. The number of IN clock cycles after EN is asserted before the outputs go HIGH varies from ...
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Typical Operating Characteristics Functional Characteristics June 2006 10 hbwhelp@micrel.com M9999-061206-B or (408) 955-1690 ...
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Input and Output Stages Figure 2a. Simplified Differential Input Stage Input Interface Applications Figure 3a. LVPECL Interface (DC-Coupled) Figure 3d. CML Interface (AC-Coupled) June 2006 Figure 2b. Simplified LVPECL Output Stage Figure 3b. LVPECL Interface (AC-Coupled) Figure 3e. LVDS Interface ...
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LVPECL Output Interface Applications LVPECL has high input impedance, and very low output impedance (open emitter), and small signal swing which results in low EMI. LVPECL is ideal for driving 50Ω- and 100Ω-controlled impedance transmission lines. There are several techniques ...
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MicroLeadFrame MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no ...