ks8701 Samsung Semiconductor, Inc., ks8701 Datasheet - Page 21

• Manufacturer Part Number: ks8701
• Description: Flextm Roaming Decoder Ii
• Manufacturer: Samsung Semiconductor, Inc.

Host-to-Decoder Packet Descriptions
20
COD: Clock Output Disable. When this bit is clear, a 38.4 kHz or 40kHz(depending on IDE and DFC) signal
MTE: Minute Timer Enable. When this bit is set, a Status Packet will be sent at one minute intervals with the
LBP:
ICO:
will be output on the CLKOUT pin. When this bit is set, the CLKOUT pin will be driven low. Note that
setting and clearing this bit can cause pulses on the CLKOUT pin that are less than one half the clock
period. Also note that when the clock output is enabled and not set for clock intermittent operation(see
ICO in this packet), the CLKOUT pin will always output the clock signal even when the KS8701 is in
reset (as long as the KS8701 oscillator is seeing clocks). Further note that the when the KS8701 is
used in internal demodulator mode(i.e. uses a 160 kHz oscillator), the CLKOUT pin will be 80 kHz from
reset until the time the IDE bit is set. This is because the KS8701 defaults to external demodulator
mode at reset. (value after reset=0)
MT (minute time-out) bit in the Status Packet set. When this bit is clear, the internal one-minute timer
stops counting. The internal one-minute timer is reset when this bit is changed from 0 to 1 or when the
MTC (minute timer clear) bit in the Control Packet is set. Note that the minute timer will not be accurate
using a 160 kHz oscillator until the IDE bit is set. (value after reset=0)
Packet is initialized to the inverse value of this bit when the KS8701 is turned on (by setting the ON bit
in the Control Packet). When the KS8701 is turned on, the first low battery update in the Status Packet
will be sent to the host when a low battery condition is detected on the LOBAT pin. Setting this bit
means that a high on the LOBAT pin indicates a low voltage condition. (value after reset=0)
the values of IDE and DFC) signal will be output on the CLKOUT pin. When this bit is set and COD is
clear, the clock will only be output on the CLKOUT pin while the receiver is not in the Off state. The
clock will be output for a few cycles before the receiver transitions from the off state and for a few
cycles after the receiver transitions to the off state (this is to insure that the receiver receives enough
clocks to detect and process the changes to and from the Off state). The CLKOUT pin will be driven
low when it is not driving a clock. Note that when the clock is automatically enabled and disabled (i.e.
when ICO is set), the CLKOUT signal transitions will be clean(i.e. no pulses less than half the clock
period) when it transitions between no clock and clocked output. This bit has no effect when COD is
set. (value after reset=0)
Intermittent Clock Out. When this bit is clear and COD is clear, a 38.4 kHz or 40 kHz (depending on
Low Battery Polarity. This bit defines the polarity of the KS8701’s LOBAT pin. The LB bit in the Status
FLEX
TM
Roaming Decoder II
KS8701