ics9fg1201 Integrated Device Technology, ics9fg1201 Datasheet - Page 16

• Manufacturer Part Number: ics9fg1201
• Description: Frequency Generator For P4tm Cpu, Pci-express* & Fully Buffered Dimm Clocks
• Manufacturer: Integrated Device Technology

Electrical Characteristics - Skew and Differential Jitter Parameters
IDT
T
NOTES:
1. Measured into fixed 2 pF load cap. Input to output skew is measured at the first output edge following the corresponding input.
2. Measured from differential cross-point to differential cross-point
3. All Bypass Mode Input-to-Output specs refer to the timing between an input edge and the specific output edge created by it.
4. This parameter is deterministic for a given device
5. Measured with scope averaging on to find mean value.
6. t is the period of the input clock
7. See http://www.pcisig.com for complete specs
8. Device driven by 932S401EGLF or equivalent
9. Measured as maximum pass band gain. At frequencies w ithin the loop BW, highest point of magnification is called PLL jitter peaking.
10. Guaranteed by design and characterization, not 100% tested in production.
11. Measured at 3 db dow n or half pow er point.
PLL Jitter Peaking
PLL Jitter Peaking
CLK_IN, DIF[x:0]
CLK_IN, DIF[x:0]
A
PLL Bandwidth
PLL Bandwidth
ICS9FG1201H
Frequency Generator for CPU, PCIe Gen1* & Fully Buffered DIMM Clocks
TM
Jitter, Phase
= 0 - 70°C; Supply Voltage V
DIF[11:10]
/ICS
DIF[11:0]
DIF[9:0]
Group
TM
Frequency Generator for CPU, PCIe Gen1* & Fully Buffered DIMM Clocks
Parameter
t
t
t
t
t
SKEW_G10
j
j
SKEW_A12
t
SKEW_G2
peak-hibw
peak-lobw
pll
jphasePLL
SPO_PLL
pll
PD_BYP
LOBW
HIBW
DD
= 3.3 V +/-5%
Output-to-Output Skew across all 12 outputs (Common to
Bypass and PLL mode - all outputs at same gear)
Input-to-Output Skew in Bypass mode (1:1 only),
Input-to-Output Skew in PLL mode (1:1 only),
(Common to Bypass and PLL mode)
(Common to Bypass and PLL mode)
Output-to-Output Skew Group of 10
Output-to-Output Skew Group of 2
nominal value @ 25°C, 3.3V
nominal value @ 25°C, 3.3V
PCIe Gen 1 phase jitter
(HIGH_BW# = 0)
(HIGH_BW# = 1)
(HIGH_BW# = 0)
(HIGH_BW# = 1)
FBD phase jitter
(1.5 - 22 MHz)
Description
(11-33 MHz)
16
-500
Min
2.5
0.7
0
0
2
Typ
Max
500
100
108
4.5
2.5
1.4
50
50
2
4
3
ps rms 1,7,8,10
1371C — 02/12/08
Units
MHz
MHz
dB
dB
ps
ns
ps
ps
ps
ps
1,2,4,5,6,
1,2,3,10
1,7,8,10
1,2,3,5,
Notes
1,2,10
1,2,10
10,11
10,11
9,10
9,10
10
10