ics9250-30 Holt Integrated Circuits, Inc., ics9250-30 Datasheet

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ics9250-30

Manufacturer Part Number
ics9250-30
Description
Frequency Generator Integrated Buffers Celeron Pii/iii
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet
1.ICS9250-30.pdf (13 pages)
Frequency Generator & Integrated Buffers for Celeron & PII/III™
Third party brands and names are the property of their respective owners.
Recommended Application:
•
•
•
•
•
•
•
Features:
•
•
•
•
•
•
Key Specifications:
•
•
•
•
•
Block Diagram
SEL24_48#
9250-30 Rev A 10/03/00
FS[4:0]
SDATA
SCLK
2 - CPUs @ 2.5V, up to 200MHz.
13 - SDRAM @ 3.3V, up to 200MHz.
3 - 3V66 @ 3.3V, 2x PCI MHz.
8 - PCI @3.3V.
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
1 - REF @3.3V, 14.318MHz.
Support PC133 SDRAM.
Up to 200MHz frequency support
Support power management through PD#.
Spread spectrum for EMI control
(± 0.25% Center Spread or 0 to -0.5% down spread)
Uses external 14.318MHz crystal
FS pins for frequency select
CPU Output Jitter: <250ps
CPU Output Skew: <175ps
PCI Output Skew: <500ps
3V66 Output Skew <175ps
For group skew timing, please refer to the
Group Timing Relationship Table.
PD#
X2
X1
XTAL
OSC
Integrated
Circuit
Systems, Inc.
Spectrum
PLL2
Spread
Control
Config.
PLL1
Logic
Reg.
DIVDER
SDRAM
DIVDER
DIVDER
DIVDER
DIVDER
IOAPIC
3V66
CPU
PCI
/ 2
12
2
8
3
48MHz
24_48MHz
SDRAM [11:0]
SDRAM_F
IOAPIC
PCICLK [7:0]
3V66 [2:0]
CPUCLK [1:0]
REF0
1
*SEL24_48#/PCICLK2
Functionality
FS4 FS3 FS2 FS1 FS0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
*FS0/PCICLK0
*FS1/PCICLK1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SDRAM11
SDRAM10
GND3V66
VDD3V66
GNDSDR
GNDREF
VDDSDR
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
VDDREF
GNDPCI
GNDPCI
VDDPCI
VDDPCI
3V66-0
3V66-1
3V66-2
SDATA
PRODUCT PREVIEW documents contain information on new products
in the sampling or preproduction phase of development. Characteristic
data and other specifications are subject to change without notice.
SCLK
0
0
1
1
0
0
1
1
0
0
0
1
0
0
0
1
Preliminary Product Preview
PD#
X1
X2
56-Pin 300 mil SSOP
0
1
1
1
0
1
1
1
0
0
1
1
0
0
1
1
2
Pin Configuration
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
0
1
0
1
0
1
0
1
0
1
1
1
0
1
1
1
100.00
103.00
115.00
200.00
133.33
166.67
137.00
160.00
133.33
166.67
137.00
160.00
66.67
68.33
80.00
83.00
CPU
SDRAM
100.00
102.50
120.00
124.50
100.00
103.00
115.00
200.00
133.33
166.67
137.00
160.00
100.00
125.00
102.75
120.00
ICS9250-30
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
66.67
68.33
80.00
83.00
66.67
68.67
76.67
66.67
66.67
83.34
68.50
80.00
66.67
83.34
68.50
80.00
3V66
REF0/FS4*
VDDLAPIC
IOAPIC
VDDLCPU
CPUCLK0
CPUCLK1
GNDLCPU
GNDSDR
SDRAM0
SDRAM1
SDRAM2
VDDSDR
SDRAM3
SDRAM4
SDRAM5
GNDSDR
SDRAM6
SDRAM7
SDRAM_F
VDDSDR
GND48
24_48MHz/FS2 *
48MHz/FS3*
VDD48
VDDSDR
SDRAM8
SDRAM9
GNDSDR
33.33
34.17
40.00
41.50
33.33
34.33
38.33
33.33
33.33
41.67
34.25
40.00
33.33
41.67
34.25
40.00
PCI
1
1
1

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ics9250-30 Summary of contents

Page 1

... PCICLK [7: 3V66 [2:0] 3 PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. ICS9250-30 Pin Configuration REF0/FS4 VDDLAPIC 3 54 IOAPIC 4 53 VDDLCPU 5 52 ...

Page 2

... ICS9250-30 Preliminary Product Preview General Description 2 Pin Configuration ...

Page 3

... Third party brands and names are the property of their respective owners. Preliminary Product Preview ICS9250- ...

Page 4

... ICS9250-30 Preliminary Product Preview ...

Page 5

... Logic Inputs Out put pin capacitance X1 & X2 pins To 1st crossing of target Freq. From 1st crossing to 1% target Freq. From target Freq. DD output enable delay (all outputs) output disable delay (all outputs) ICS9250-30 Preliminary Product Preview ...

Page 6

... ICS9250-30 Preliminary Product Preview Electrical Characteristics - CPU 70C 2.5 V +/-5 DDL PARAMETER SYMBOL 1 Output Impedance R DSP2B 1 Output Impedance R DSN2B Output High Voltage V OH2B Output Low Voltage V OL2B Output High Current I OH2B Output Low Current I OL2B 1 Rise Time t r2B 1 Fall Time ...

Page 7

... 2 =3.135 V OH @MIN OH@ MAX =0.4 V OL@ MIN OL@ MAX ICS9250-30 Preliminary Product Preview MIN TYP MAX UNITS 0.4 -36 - 0.4 1.6 nS 0.4 1 500 pS MIN TYP MAX UNITS ...

Page 8

... ICS9250-30 Preliminary Product Preview Electrical Characteristics - PCI 70C 3.3 V +/-5 PARAMETER SYMBOL 1 Output Impedance R DSP1 1 Output Impedance R DSN1 Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 Output Low Current I OL1 1 Rise Time Fall Time ...

Page 9

... Third party brands and names are the property of their respective owners serial interface information 2 How to Read: (H) ACK ACK ACK ACK ACK ACK ACK ACK ACK 2 2 ICS9250-30 Preliminary Product Preview 2 How to Read: Controller (Host) ICS (Slave/Receiver) Start Bit Address D3 (H) ACK Byte Count ACK Byte 0 ACK Byte 1 ACK ...

Page 10

... ICS9250-30 Preliminary Product Preview Shared Pin Operation - Input/Output Pins Programming Header Via to Gnd Device Pad Third party brands and names are the property of their respective owners. Via to VDD 2K 8.2K Clock trace to load Series Term. Res. Fig. 1 ...

Page 11

... Power Down Waveform Third party brands and names are the property of their respective owners. ICS9250-30 Preliminary Product Preview ...

Page 12

... ICS9250-30 Preliminary Product Preview 0ns CPU 66MHz CPU 100MHz CPU 133MHz SDRAM 100MHz SDRAM 133MHz 3.5V 66MHz PCI 33MHz APIC 33MHz REF 14.318MHz USB 48MHz Third party brands and names are the property of their respective owners. 10ns 20ns Cycle Repeats Group Offset Waveforms ...

Page 13

... Ordering Information ICS9250yF-30-T ICS XXXX PPP - T Third party brands and names are the property of their respective owners. ICS9250-30 Preliminary Product Preview SYMBOL In Millimeters COMMON DIMENSIONS COMMON DIMENSIONS MIN MAX A 2.413 2.794 A1 0.203 0.406 b 0.203 0.343 c 0.127 0.254 SEE VARIATIONS D E 10.033 10 ...

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