ics87951-147 Integrated Device Technology, ics87951-147 Datasheet - Page 9

• Manufacturer Part Number: ics87951-147
• Description: Differential Or Lvcmos-input Lvcmos-output 2 9 250-mhz Clock Generator
• Manufacturer: Integrated Device Technology

W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
P
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS87951I-147 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance, power
supply isolation is required. Figure 2 illustrates how
a 10Ω resistor along with a 10μF and a .01μF bypass
capacitor should be connected to each V
87951AYI-147
OWER
IRING THE
S
UPPLY
D
Integrated
Circuit
Systems, Inc.
IFFERENTIAL
F
ILTERING
T
F
I
NPUT TO
ECHNIQUES
IGURE
Single Ended Clock Input
1. S
A
DDA
A
PPLICATION
pin.
www.icst.com/products/hiperclocks.html
D
CCEPT
INGLE
IFFERENTIAL
DDA
, and V
E
C1
0.1u
S
NDED
V_REF
INGLE
DD
/2 is
S
DDO
IGNAL
E
9
-
I
NDED
TO
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
NFORMATION
D
1K
R1
1K
R2
-LVCMOS/LVTTL Z
RIVING
VDD
L
EVELS
CLK
nCLK
D
IFFERENTIAL
F
IGURE
2. P
V
V
DDO
DDA
I
OWER
NPUT
DD
ICS87951I-147
.01μF
= 3.3V, V_REF should be 1.25V
.01μF
S
UPPLY
ERO
L
3.3V or 2.5V
OW
F
10 Ω
10μF
ILTERING
D
S
ELAY
KEW
REV. A JUNE 14, 2005
, 1-
B
UFFER
TO
-9