mt48h4m16lf Micron Semiconductor Products, mt48h4m16lf Datasheet - Page 45
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mt48h4m16lf
Manufacturer Part Number
mt48h4m16lf
Description
64mb 4 Meg X 16 Mobile Sdram Features
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H4M16LF.pdf
(62 pages)
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Timing Diagrams
Figure 32:
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
Command
A0–A9, A11
BA0, BA1
DQM
A10
CLK
CKE
DQ
1
Initialize and Load Mode Register
Power-up:
V
CLK stable
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Notes:
T = 100µs
and
t
CMS
t
CKS
NOP
T0
1. PRE = PRECHARGE command, AR = AUTO REFRESH command, and LMR = LOAD MODE REG-
2. Only NOPs or COMMAND INHIBITs may be issued during
3. At least one NOP or COMMAND INHIBIT is required during
t
t
High-Z
CKH
CMH
ISTER command.
t
CK
t
Precharge
All Banks
AS
all banks
PRE
T1
t AH
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Tn + 1
AR
45
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RFC
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2
To + 1
AR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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64Mb: 4 Meg x 16 Mobile SDRAM
2
t AS t AH
t
Load mode
AS
BA0 = L,
BA1 = L
Tp + 1
Code
register
LMR
Code
t
AH
t
MRD
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RFC time.
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Load extended
mode register
t
3
MRD time.
BA0 = L,
BA1 = H
BA0 = L,
BA1 = L
Code
Code
Tq + 1
LMR
©2006 Micron Technology, Inc. All rights reserved.
Timing Diagrams
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3
VALID
Tr + 1
Valid
Valid
Valid
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