cy7c1386b-cy7c1387b Cypress Semiconductor Corporation., cy7c1386b-cy7c1387b Datasheet - Page 7

• Manufacturer Part Number: cy7c1386b-cy7c1387b
• Description: 512k X 36/1m X 18 Pipelined Dcd Sram
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-05195 Rev. **
Pin Definitions
Name
V
128M
V
TDO
TMS
TCK
32M
64M
V
V
TDI
NC
DDQ
SSQ
DD
SS
JTAG serial output
JTAG serial input
Test Mode Select
Power supply
synchronous
synchronous
synchronous
JTAG serial
I/O Ground
I/O Power
Ground
Supply
clock
I/O
–
–
Serial data-out to the JTAG circuit. Delivers data on the negative edge of
TCK (BGA only).
Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK (BGA
only).
This pin controls the Test Access Port (TAP) state machine. Sampled on the
rising edge of TCK (BGA only).
Serial clock to the JTAG circuit (BGA only).
Power supply inputs to the core of the device. Should be connected to
3.3V –5% +10% power supply.
Ground for the core of the device. Should be connected to ground of the
system.
Power supply for the I/O circuitry. Should be connected to a 2.5V –5% or
a 3.3V –5% +10% power supply (see page 20).
Ground for the I/O circuitry. Should be connected to ground of the system.
No connects. Pins are not internally connected.
No connects. Reserved for address expansion. Pins are not internally
connected.
Description
CY7C1386B
CY7C1387B
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