s908az32ag2cfue Freescale Semiconductor, Inc, s908az32ag2cfue Datasheet - Page 129

• Manufacturer Part Number: s908az32ag2cfue
• Description: M68hc08 Microcontrollers 8-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 14
Low Voltage Inhibit (LVI)
14.1 Introduction
This section describes the low-voltage inhibit module (LVI47, Version A), which monitors the voltage on
the V
14.2 Features
Features of the LVI module include:
14.3 Functional Description
Figure 14-1
contains a bandgap reference circuit and comparator. The LVI power bit, LVIPWR, enables the LVI to
monitor V
falls below a voltage, LVI
cycles.
Note that short V
within the specified operating voltage range if normal microcontroller operation is to be guaranteed.
LVISTOP, enables the LVI module during stop mode. This will ensure when the STOP instruction is
implemented, the LVI will continue to monitor the voltage level on V
are in the configuration register, CONFIG-1 (see
Once an LVI reset occurs, the MCU remains in reset until V
be above LVI
Operation). The output of the comparator controls the state of the LVIOUT flag in the LVI status register
(LVISR).
An LVI reset also drives the RST pin low to provide low-voltage protection to external peripheral devices.
Freescale Semiconductor
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•
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Programmable LVI Reset
Programmable Power Consumption
Digital Filtering of V
pin and can force a reset when the V
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shows the structure of the LVI module. The LVI is enabled out of reset. The LVI module
voltage. The LVI reset bit, LVIRST, enables the LVI module to generate a reset when V
TRIPR
If a low voltage interrupt (LVI) occurs during programming of EEPROM or
Flash memory, then adequate programming time may not have been
allowed to ensure the integrity and retention of the data. It is the
responsibility of the user to ensure that in the event of an LVI any addresses
being programmed receive specification programming conditions.
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for only one CPU cycle to bring the MCU out of reset (see
spikes may not trip the LVI. It is the user’s responsibility to ensure a clean V
TRIPF
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Pin Level
, and remains at or below that level for nine or more consecutive CPU
MC68HC908AZ32A Data Sheet, Rev. 2
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voltage falls to the LVI trip voltage.
NOTE
Chapter 9 Configuration Register
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rises above a voltage, LVI
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. LVIPWR, LVISTOP, and LVIRST
14.3.2 Forced Reset
(CONFIG-1)).
TRIPR
. V
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signal
must
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