s908qc16g0cdte Freescale Semiconductor, Inc, s908qc16g0cdte Datasheet - Page 53

• Manufacturer Part Number: s908qc16g0cdte
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

LVIPWRD — LVI Power Disable Bit
LVITRIP — LVI Trip Point Selection Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
Freescale Semiconductor
LVIPWRD disables the LVI module.
LVITRIP selects the voltage operating mode of the LVI module. The voltage mode selected for the LVI
should match the operating V
SSREC enables the CPU to exit stop mode with a delay of 32 BUSCLKX4 cycles instead of a 4096
BUSCLKX4 cycle delay.
When using the LVI during normal operation but disabling during stop mode, the LVI will have an
enable time of t
BUSCLKX4 cycles) gives a delay longer than the LVI enable time for these startup scenarios. There
is no period where the MCU is not protected from a low-power condition. However, when using the
short stop recovery configuration option, the 32 BUSCLKX4 delay must be greater than the LVI’s turn
on time to avoid a period in startup where the LVI is not protecting the MCU.
STOP enables the STOP instruction.
COPD disables the COP module.
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI operates for a 5-V protection
0 = LVI operates for a 2-V protection
1 = Stop mode recovery after 32 BUSCLKX4 cycles
0 = Stop mode recovery after 4096 BUSCLKX4 cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
The LVITRIP bit is cleared by a power-on reset (POR) only. Other resets
will leave this bit unaffected.
Exiting stop mode by an LVI reset will result in the long stop recovery.
EN
. The system stabilization time for power-on reset and long stop recovery (both 4096
DD
MC68HC08QY/QT Family Data Sheet, Rev. 2
for the LVI’s voltage trip points for each of the modes.
NOTE
NOTE
Functional Description
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