s908qc16g0cdte Freescale Semiconductor, Inc, s908qc16g0cdte Datasheet - Page 142

• Manufacturer Part Number: s908qc16g0cdte
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

Development Support
Table 15-2
15.3.1.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
15.3.1.4 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
15.3.1.5 Baud Rate
The monitor communication baud rate is controlled by the frequency of the external or internal oscillator
and the state of the appropriate pins as shown in
Table 15-1
bus frequency divided by 256 when using an external oscillator. When using the internal oscillator in
forced monitor mode, the effective baud rate is the bus frequency divided by 335.
15.3.1.6 Commands
The monitor ROM firmware uses these commands:
142
•
•
•
•
•
•
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
User
Monitor
Modes
summarizes the differences between user mode and monitor mode regarding vectors.
also lists the bus frequencies to achieve standard baud rates. The effective baud rate is the
START
BIT
Vector High
0
$FFFE
$FEFE
Reset
BIT 0
1
2
BIT 1
MISSING STOP BIT
3
MC68HC08QY/QT Family Data Sheet, Rev. 2
Figure 15-11. Monitor Data Format
Figure 15-12. Break Transaction
4
Vector Low
BIT 2
Table 15-2. Mode Difference
$FEFF
$FFFF
Reset
5
6
BIT 3
7
Vector High
BIT 4
Table
$FFFC
$FEFC
Break
Functions
BIT 5
15-1.
2-STOP BIT DELAY BEFORE ZERO ECHO
Vector Low
BIT 6
0
$FEFD
$FFFD
Break
1
BIT 7
2
3
Vector High
STOP
BIT
$FFFC
$FEFC
4
SWI
START
NEXT
5
BIT
6
Freescale Semiconductor
Vector Low
7
$FFFD
$FEFD
SWI