z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 254
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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ADC Overview
Architecture
Operation
PS022006-0207
ADC Output = 1024*(ANAx/VREF)
The ZNEO Z16F Series devices include a 12-channel ADC. The ADC converts an analog
input signal to a 10-bit binary number. The features of the successive approximation ADC
include:
•
•
•
•
•
•
•
•
The architecture as illustrated in
plexer, sample-and-hold amplifier, and 10-bit successive approximation ADC. The ADC
digitizes the signal on selected channel and stores the digitized data in the ADC data regis-
ters. In environment with high electrical noise, an external RC filter must be added at the
input pins to reduce high frequency noise.
The ADC converts the analog input, ANAx, to a 10-bit digital representation.
The equation for calculating the digital value is represented by:
Assuming zero gain and offset errors, any voltage outside the ADC input limits of AVSS
and VREF returns all 0s or 1s, respectively.
A new conversion is initiated by either software write to the ADC Control Register’s
START bit or by PWM trigger. For detailed information on the PWM trigger,
see
conversion stops any conversion currently in progress and begins a new conversion.
To avoid disrupting a conversion already in progress, the START bit is read to indicate
ADC operation status (busy or available).
12 analog input sources multiplexed with GPIO ports.
Fast conversion time, less than 5 μs.
Programmable timing controls.
Interrupt on conversion complete.
Internal voltage reference generator.
Internal reference voltage available externally.
Ability to supply external reference voltage.
Ability to do simultaneous or independent conversions.
Synchronization of PWM and ADC
P R E L I M I N A R Y
Figure 51
on page 119. Initiating a new
on page 239 consists of an 12-input multi-
Product Specification
ZNEO
Analog Functions
™
Z16F Series
240
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