tm1300 NXP Semiconductors, tm1300 Datasheet - Page 479
tm1300
Manufacturer Part Number
tm1300
Description
Tm-1300 Media Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TM1300.pdf
(533 pages)
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Philips Semiconductors
Unsigned 8-bit load with index
SYNTAX
FUNCTION
DESCRIPTION
32 bits, and writes the result in r dest . This operation does not depend on the bytesex bit in the PCSW since only a
single byte is loaded.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of r guard is 1, r dest is written and
the data cache status bits are updated if the addressed location is cacheable. if the LSB of r guard is 0, r dest is not
changed and
EXAMPLES
r10 = 0xd00, r20 = 2, [0xd02] = 0x22
r50 = 0, r40 = 0xd04, r30 = 0xfffffffc,
[0xd00] = 0x84
r60 = 1, r40 = 0xd04, r30 = 0xfffffffc,
[0xd00] = 0x84
r70 = 0xd05, r30 = 0xfffffffc,
[0xd01] = 0x33
The
The result of an access by
The
[ IF r guard ] uld8r r src1 r src2
if r guard then
r dest
uld8r
uld8r
Initial Values
zero_ext8to32(mem[r src1 + r src2 ])
uld8r
operation loads the 8-bit memory value from the address computed by r src1 + r src2 , zero extends it to
operation optionally takes a guard, specified in r guard . If a guard is present, its LSB controls the
has no side effects whatever.
uld8r
uld8r r10 r20
IF r50 uld8r r40 r30
IF r60 uld8r r40 r30
uld8r r70 r30
to the MMIO address aperture is undefined; access to the MMIO aperture is
r dest
Operation
r80
r110
PRODUCT SPECIFICATION
r90
r100
r80
no change, since guard is false
r100
r110
DSPCPU Operations for TM1300
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
0x00000022
0x00000084
0x00000033
uld8 ild8 uld8d ild8d
ATTRIBUTES
SEE ALSO
Result
ild8r
uld8r
dmem
194
4, 5
No
—
2
3
A-193
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