sg2567udr212851hc ETC-unknow, sg2567udr212851hc Datasheet - Page 13
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sg2567udr212851hc
Manufacturer Part Number
sg2567udr212851hc
Description
Dram Module Ddr2 Sdram 2gbyte 240udimm
Manufacturer
ETC-unknow
Datasheet
1.SG2567UDR212851HC.pdf
(26 pages)
Extended Mode Register Table Definition
The extended mode register controls functions beyond those controlled by the mode register; these additional functions are DLL
enable/disable, output drive strength, ODT (R
(OCD), DQS# enable/disable, RDQS/RDQS# enable/disable, and OUTPUT enable/disable. The extended mode register is pro-
grammed via the LOAD MODE (LM) command and will retain the stored information until it is programmed again or the device
loses power. Reprogramming the extended mode register will not alter the contents of the memory array, provided it is per-
formed correctly.
The extended mode register must be loaded when all banks are idle and no bursts are in progress, and the controller must wait
the specified time t
unspecified operation.
Notes:
1.
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4.
5.
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A14~A15 are reserved for future use and must be programmed to 0 when setting the mode register.
When the adjust mode of the OCD Calibration Program is issued, AL from previously set value must be applied.
After setting the OCD Calibration Program to default, OCD mode needs to be exited by setting A9-A7 to 000.
Outputs disabled - DQs, DQSs, DQS#s, RDQSs, RDQS#s. This feature is used in conjunction with DIMM I
is not desired to be included.
If RDQS is enabled, the DM function is disabled. RDQS is active for reads and don’t care for writes.
MRD
before initiating any subsequent operation. Violating either of these requirements could result in
TT
), Posted CAS additive latency (AL), off-chip driver impedance calibration
SG2567UDR212851UU
DD
measurements when I
March 17, 2008
DDQ
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